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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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H8S/2240 数据表(PDF) 197 Page - Renesas Technology Corp |
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H8S/2240 数据表(HTML) 197 Page - Renesas Technology Corp |
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197 / 818 page  Section 6 Bus Controller Rev.3.00 Mar. 26, 2007 Page 155 of 772 REJ09B0355-0300 6.5.3 Valid Strobes Table 6.4 shows the data buses used and valid strobes for the access spaces. In a read, the RD signal is valid without discrimination between the upper and lower halves of the data bus. In a write, the HWR signal is valid for the upper half of the data bus, and the LWR signal for the lower half. Table 6.4 Data Buses Used and Valid Strobes Area Access Size Read/ Write Address Valid Strobe Upper Data Bus (D 15 to D8) Lower data bus (D 7 to D0) Byte Read — RD Valid Invalid 8-bit access space Write — HWR Hi-Z Byte Read Even RD Valid Invalid 16-bit access space Odd Invalid Valid Write Even HWR Valid Hi-Z Odd LWR Hi-Z Valid Word Read — RD Valid Valid Write — HWR, LWR Valid Valid Note: Invalid: Input state; input value is ignored. Hi-Z: High impedance. |
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