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H8SX/1663 数据表(PDF) 669 Page - Renesas Technology Corp |
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H8SX/1663 数据表(HTML) 669 Page - Renesas Technology Corp |
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669 / 1158 page  Section 12 8-Bit Timers (TMR) Rev.1.00 Jun. 07, 2006 Page 617 of 1102 REJ09B0294-0100 Table 12.2 Clock Input to TCNT and Count Condition (Units 0 and 1) TCR TCCR Channel Bit 2 CKS2 Bit 1 CKS1 Bit 0 CKS0 Bit 1 ICKS1 Bit 0 ICKS0 Description TMR_0 0 0 0 Clock input prohibited 0 0 1 0 0 Uses internal clock. Counts at rising edge of P φ/8. 0 1 Uses internal clock. Counts at rising edge of P φ/2. 1 0 Uses internal clock. Counts at falling edge of P φ/8. 1 1 Uses internal clock. Counts at falling edge of P φ/2. 0 1 0 0 0 Uses internal clock. Counts at rising edge of P φ/64. 0 1 Uses internal clock. Counts at rising edge of P φ/32. 1 0 Uses internal clock. Counts at falling edge of P φ/64. 1 1 Uses internal clock. Counts at falling edge of P φ/32. 0 1 1 0 0 Uses internal clock. Counts at rising edge of P φ/8192. 0 1 Uses internal clock. Counts at rising edge of P φ/1024. 1 0 Uses internal clock. Counts at falling edge of P φ/8192. 1 1 Uses internal clock. Counts at falling edge of P φ/1024. 1 0 0 Counts at TCNT_1 overflow signal* 1. TMR_1 0 0 0 Clock input prohibited 0 0 1 0 0 Uses internal clock. Counts at rising edge of P φ/8. 0 1 Uses internal clock. Counts at rising edge of P φ/2. 1 0 Uses internal clock. Counts at falling edge of P φ/8. 1 1 Uses internal clock. Counts at falling edge of P φ/2. 0 1 0 0 0 Uses internal clock. Counts at rising edge of P φ/64. 0 1 Uses internal clock. Counts at rising edge of P φ/32. 1 0 Uses internal clock. Counts at falling edge of P φ/64. 1 1 Uses internal clock. Counts at falling edge of P φ/32. 0 1 1 0 0 Uses internal clock. Counts at rising edge of P φ/8192. 0 1 Uses internal clock. Counts at rising edge of P φ/1024. 1 0 Uses internal clock. Counts at falling edge of P φ/8192. 1 1 Uses internal clock. Counts at falling edge of P φ/1024. 1 0 0 Counts at TCNT_0 compare match A* 1. All 1 0 1 Uses external clock. Counts at rising edge* 2. 1 1 0 Uses external clock. Counts at falling edge* 2. 1 1 1 Uses external clock. Counts at both rising and falling edges* 2. Notes: 1. If the clock input of channel 0 is the TCNT_1 overflow signal and that of channel 1 is the TCNT_0 compare match signal, no incrementing clock is generated. Do not use this setting. 2. To use the external clock, the DDR and ICR bits in the corresponding pin should be set to 0 and 1, respectively. For details, see section 9, I/O Ports. |
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