H8SXSLASH1663 datasheet(693/1158 Pages) RENESAS

部件名	H8SX/1663

功能描述	Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

PDF	1158 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

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693 / 1158 page

Section 14 Watchdog Timer (WDT)

Rev.1.00 Jun. 07, 2006 Page 641 of 1102

REJ09B0294-0100

Section 14 Watchdog Timer (WDT)

The watchdog timer (WDT) is an 8-bit timer that outputs an overflow signal (

WDTOVF) if a

system crash prevents the CPU from writing to the timer counter, thus allowing it to overflow. At

the same time, the WDT can also generate an internal reset signal.

When this watchdog function is not needed, the WDT can be used as an interval timer. In interval

timer operation, an interval timer interrupt is generated each time the counter overflows.

Figure 14.1 shows a block diagram of the WDT.

14.1

Features

• Selectable from eight counter input clocks

• Switchable between watchdog timer mode and interval timer mode

 In watchdog timer mode

If the counter overflows, the WDT outputs

WDTOVF. It is possible to select whether or

not the entire LSI is reset at the same time.

 In interval timer mode

If the counter overflows, the WDT generates an interval timer interrupt (WOVI).

H8SX/1663 数据表(PDF) 693 Page - Renesas Technology Corp