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H8SX/1663 数据表(PDF) 720 Page - Renesas Technology Corp |
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H8SX/1663 数据表(HTML) 720 Page - Renesas Technology Corp |
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720 / 1158 page ![]() Section 15 Serial Communication Interface (SCI, IrDA, CRC) Rev.1.00 Jun. 07, 2006 Page 668 of 1102 REJ09B0294-0100 Bit Bit Name Initial Value R/W Description 2 TEIE 0 R/W Transmit End Interrupt Enable When this bit is set to 1, a TEI interrupt request is enabled. A TEI interrupt request can be cancelled by reading 1 from the TDRE flag and then clearing the flag to 0 in order to clear the TEND flag to 0, or by clearing the TEIE bit to 0. 1 0 CKE1 CKE0 0 0 R/W R/W Clock Enable 1, 0 (for SCI_0, 1, and 4) These bits select the clock source and SCK pin function. • Asynchronous mode 00: On-chip baud rate generator The SCK pin functions as I/O port. 01: On-chip baud rate generator The clock with the same frequency as the bit rate is output from the SCK pin. 1X: External clock The clock with a frequency 16 times the bit rate should be input from the SCK pin. • Clocked synchronous mode 0X: Internal clock The SCK pin functions as the clock output pin. 1X: External clock The SCK pin functions as the clock input pin. |
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