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H8SX/1663 数据表(PDF) 822 Page - Renesas Technology Corp

部件名 H8SX/1663
功能描述  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8SX/1663 数据表(HTML) 822 Page - Renesas Technology Corp

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Section 16 USB Function Module (USB)
Rev.1.00 Jun. 07, 2006 Page 770 of 1102
REJ09B0294-0100
16.3.19
Data Status Register (DASTS)
DASTS indicates whether the transmit FIFO buffers contain valid data. A bit is set when data is
written to the corresponding FIFO buffer and the packet enable state is set, and cleared when all
data has been transmitted to the host.
Bit
Bit Name
Initial Value
R/W
7
0
R
6
0
R
5
EP3 DE
0
R
4
EP2 DE
0
R
3
0
R
2
0
R
1
0
R
0
EP0i DE
0
R
Bit
Bit Name
Initial
Value
R/W
Description
7
6
0
0
R
R
Reserved
These bits are always read as 0. The write value
should always be 0.
5
EP3 DE
0
R
EP3 Data Present
This bit is set when the endpoint 3 FIFO buffer
contains valid data.
4
EP2 DE
0
R
EP2 Data Present
This bit is set when the endpoint 2 FIFO buffer
contains valid data.
3
2
1
0
0
0
R
R
R
Reserved
These bits are always read as 0.
0
EP0i DE
0
R
EP0i Data Present
This bit is set when the endpoint 0 FIFO buffer
contains valid data.



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