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H8SX/1663 数据表(PDF) 819 Page - Renesas Technology Corp |
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H8SX/1663 数据表(HTML) 819 Page - Renesas Technology Corp |
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819 / 1158 page ![]() Section 16 USB Function Module (USB) Rev.1.00 Jun. 07, 2006 Page 767 of 1102 REJ09B0294-0100 16.3.15 EP3 Data Register (EPDR3) EPDR3 is an 8-byte transmit FIFO buffer for endpoint 3. EPDR3 holds one packet of transmit data for the interrupt transfer of endpoint 3. Transmit data is fixed by writing one packet of data and setting EP3PKTE in the trigger register. When an ACK handshake is returned from the host after one packet of data has been transmitted successfully, EP3TS in interrupt flag register 0 is set. This FIFO buffer can be initialized by means of EP3CLR in the FCLR register. Bit Bit Name Initial Value R/W 7 D7 Undefined W 6 D6 Undefined W 5 D5 Undefined W 4 D4 Undefined W 3 D3 Undefined W 2 D2 Undefined W 1 D1 Undefined W 0 D0 Undefined W Bit Bit Name Initial Value R/W Description 7 to 0 D7 to D0 Undefined W Data register for endpoint 3 transfer 16.3.16 EP0o Receive Data Size Register (EPSZ0o) EPSZ0o indicates the number of bytes received at endpoint 0 from the host. Bit Bit Name Initial Value R/W 7 — 0 R 6 — 0 R 5 — 0 R 4 — 0 R 3 — 0 R 2 — 0 R 1 — 0 R 0 — 0 R Bit Bit Name Initial Value R/W Description 7 to 0 — All 0 R Number of receive data for endpoint 0 |
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