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H8SX/1663 数据表(PDF) 974 Page - Renesas Technology Corp

部件名 H8SX/1663
功能描述  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8SX/1663 数据表(HTML) 974 Page - Renesas Technology Corp

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Section 21 Flash Memory (0.18-
µm F-ZTAT Version)
Rev.1.00 Jun. 07, 2006 Page 922 of 1102
REJ09B0294-0100
In consideration of these conditions, the areas in which the program data can be stored and
executed are determined by the combination of the processing contents, operating mode, and bank
structure of the memory MATs, as shown in tables 21.8 to 21.10.
Table 21.8
Executable Memory MAT
Operating Mode
Processing Contents
User Program Mode
Programming
See Table 21.9
Erasing
See Table 21.10
Table 21.9
Usable Area for Programming in User Program Mode
Storable/Executable Area
Selected MAT
Item
On-Chip RAM
User MAT
User MAT
Embedded
Program
Storage MAT
Storage area for program data
O
×*
Operation for selecting on-chip
program to be downloaded
O
O
O
Operation for writing H'A5 to FKEY
O
O
O
Execution of writing 1 to SCO bit in
FCCS (download)
O
×
O
Operation for clearing FKEY
O
O
O
Decision of download result
O
O
O
Operation for download error
O
O
O
Operation for setting initialization
parameter
O
O
O
Execution of initialization
O
×
O
Decision of initialization result
O
O
O
Operation for initialization error
O
O
O
NMI handling routine
O
×
O
Operation for disabling interrupts
O
O
O
Operation for writing H'5A to FKEY
O
O
O
Operation for setting programming
parameter
O
×
O
Execution of programming
O
×
O
Decision of programming result
O
×
O
Operation for programming error
O
×
O
Operation for clearing FKEY
O
×
O
Note:
*
Transferring the program data to the on-chip RAM beforehand enables this area to be
used.



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