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H8SX/1663 数据表(PDF) 978 Page - Renesas Technology Corp |
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H8SX/1663 数据表(HTML) 978 Page - Renesas Technology Corp |
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978 / 1158 page  Section 21 Flash Memory (0.18- µm F-ZTAT Version) Rev.1.00 Jun. 07, 2006 Page 926 of 1102 REJ09B0294-0100 Error protection is canceled by a reset. Note that the reset should be released after the reset input period of at least 100 µs has passed. Since high voltages are applied during programming/erasing of the flash memory, some voltage may remain after the error protection state has been entered. For this reason, it is necessary to reduce the risk of damaging the flash memory by extending the reset input period so that the charge is released. The state-transition diagram in figure 21.16 shows transitions to and from the error protection state. Reset (hardware protection) Programming/erasing mode Error-protection mode Error-protection mode (software standby) Read disabled Programming/erasing enabled FLER = 0 Read disabled Programming/erasing disabled FLER = 0 Read enabled Programming/erasing disabled FLER = 1 Read disabled Programming/erasing disabled FLER = 1 RES = 0 Error occurrence Error occ urred (Software stand by) RES = 0 Software standby mode Cancel software standby mode RES = 0 Programming/erasing interface register is in its initial state. Programming/erasing interface register is in its initial state. Figure 21.16 Transitions to Error Protection State |
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