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数据搜索系统，热门电子元器件搜索 |
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H8SX/1663 数据表(PDF) 977 Page - Renesas Technology Corp |
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H8SX/1663 数据表(HTML) 977 Page - Renesas Technology Corp |
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977 / 1158 page  Section 21 Flash Memory (0.18- µm F-ZTAT Version) Rev.1.00 Jun. 07, 2006 Page 925 of 1102 REJ09B0294-0100 21.8.2 Software Protection The software protection protects the flash memory against programming/erasing by disabling download of the programming/erasing program, using the key code, and by the RAMER setting. Table 21.12 Software Protection Function to be Protected Item Description Download Programming/ Erasing Protection by SCO bit The programming/erasing protection state is entered when the SCO bit in FCCS is cleared to 0 to disable download of the programming/erasing programs. O O Protection by FKEY The programming/erasing protection state is entered because download and programming/erasing are disabled unless the required key code is written in FKEY. O O Emulation protection The programming/erasing protection state is entered when the RAMS bit in the RAM emulation register (RAMER) is set to 1. O O 21.8.3 Error Protection Error protection is a mechanism for aborting programming or erasure when a CPU runaway occurs or operations not according to the programming/erasing procedures are detected during programming/erasing of the flash memory. Aborting programming or erasure in such cases prevents damage to the flash memory due to excessive programming or erasing. If an error occurs during programming/erasing of the flash memory, the FLER bit in FCCS is set to 1 and the error protection state is entered. • When an interrupt request, such as NMI, occurs during programming/erasing. • When the flash memory is read from during programming/erasing (including a vector read or an instruction fetch). • When a SLEEP instruction is executed (including software-standby mode) during programming/erasing. • When a bus master other than the CPU, such as the DMAC and DTC, obtains bus mastership during programming/erasing. |
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