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R4F2114R 数据表(PDF) 49 Page - Renesas Technology Corp |
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R4F2114R 数据表(HTML) 49 Page - Renesas Technology Corp |
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49 / 1038 page ![]() Section 1 Overview Rev. 3.00 Jul. 14, 2005 Page 1 of 986 REJ09B0098-0300 Section 1 Overview 1.1 Overview • 16-bit high-speed H8S/2000 CPU Upward-compatible with the H8/300 and H8/300H CPUs on an object level Sixteen 16-bit general registers 65 basic instructions • Various peripheral functions Data transfer controller (DTC) 8-bit PWM timer (PWM) 14-bit PWM timer (PWMX) 16-bit timer pulse unit (TPU) 16-bit free-running timer (FRT) 8-bit timer (TMR) Watchdog timer (WDT) Asynchronous or clocked synchronous serial communication interface (SCI) I 2C bus interface (IIC) Keyboard buffer control unit (KBU) LPC interface (LPC) 10-bit A/D converter Boundary scan (JTAG) Clock pulse generator • On-chip memory ROM Type Model ROM RAM Remarks Flash memory version R4F2114R 1 Mbyte 8 kbytes Being developed • General I/O ports I/O pins: 106 Input-only pins: 13 • Supports various power-down states • Compact package |
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