H8SLASH3006 datasheet(21/796 Pages) RENESAS

21 / 796 page

Rev.5.00 Sep. 12, 2007 Page xxi of xxviii

REJ09B0396-0500

9.2.4

Timer Interrupt Status Register A (TISRA)......................................................... 297

9.2.5

Timer Interrupt Status Register B (TISRB) ......................................................... 300

9.2.6

Timer Interrupt Status Register C (TISRC) ......................................................... 303

9.2.7

Timer Counters (16TCNT) .................................................................................. 305

9.2.8

General Registers (GRA, GRB)........................................................................... 306

9.2.9

Timer Control Registers (16TCR) ....................................................................... 307

9.2.10 Timer I/O Control Register (TIOR) ..................................................................... 310

9.2.11 Timer Output Level Setting Register C (TOLR) ................................................. 312

9.3

CPU Interface.................................................................................................................... 314

9.3.1

16-Bit Accessible Registers ................................................................................. 314

9.3.2

8-Bit Accessible Registers ................................................................................... 316

9.4

Operation........................................................................................................................... 317

9.4.1

Overview.............................................................................................................. 317

9.4.2

Basic Functions .................................................................................................... 317

9.4.3

Synchronization ................................................................................................... 325

9.4.4

PWM Mode.......................................................................................................... 327

9.4.5

Phase Counting Mode .......................................................................................... 331

9.4.6

Setting Initial Value of 16-Bit Timer Output ....................................................... 333

9.5

Interrupts ........................................................................................................................... 334

9.5.1

Setting of Status Flags.......................................................................................... 334

9.5.2

Timing of Clearing of Status Flags ...................................................................... 336

9.5.3

Interrupt Sources and DMA Controller Activation.............................................. 336

9.6

Usage Notes ...................................................................................................................... 338

Section 10 8-Bit Timers..................................................................................................... 351

10.1

Overview........................................................................................................................... 351

10.1.1 Features ................................................................................................................ 351

10.1.2 Block Diagram ..................................................................................................... 352

10.1.3 Pin Configuration................................................................................................. 353

10.1.4 Register Configuration......................................................................................... 354

10.2

Register Descriptions ........................................................................................................ 355

10.2.1 Timer Counters (8TCNT) .................................................................................... 355

10.2.2 Time Constant Registers A (TCORA) ................................................................. 356

10.2.3 Time Constant Registers B (TCORB).................................................................. 357

10.2.4 Timer Control Register (8TCR) ........................................................................... 358

10.2.5 Timer Control/Status Registers (8TCSR) ............................................................ 361

10.3

CPU Interface.................................................................................................................... 366

10.3.1 8-Bit Registers ..................................................................................................... 366

10.4

Operation........................................................................................................................... 368

10.4.1 8TCNT Count Timing.......................................................................................... 368

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