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M16C/26 数据表(PDF) 21 Page - Renesas Technology Corp |
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M16C/26 数据表(HTML) 21 Page - Renesas Technology Corp |
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21 / 239 page ![]() Reset 15 Renesas Technology Corp. M16C/26 Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Under development Preliminary Specifications Rev. 0.9 Specifications in this manual are tentative and subject to change. Voltage detection circuit The voltage detection circuit has monitoring circuits to check the input voltage of the VCC pin. These circuits monitor the the input voltage at VDET3 and VDET4. Bits VC26 and VC27 of VCR2 register are used to enable/disable these monitoring circuits. The VDET3 monitoring circuit is used for detecting the minimum VCC that guarantees proper chip operation. The VDET4 monitoring circuit can be set to detect whether the input voltage is equal to and greater or less than VDET4 depending on the value of VC13 bit of the VCR1 register. In addition, the VDET4 monitoring circuit, if enabled, can generate an interrupt. Figure 1.5.4. Reset circuit block Watchdog timer control register Symbol Address After reset WDC 000F16 00?XXXXX2(Note1) Function Bit symbol RW b7 b6 b5 b4 b3 b2 b1 b0 High-order bit of watchdog timer WDC7 Bit name Prescaler select bit 0 : Divided by 16 1 : Divided by 128 Reserved bit Set to 0 0 RO RW RW RW Cold start / warm start discrimination flag (Note 2) 0 : Cold start 1 : Warm start WDC5 Note 2: The WDC5 bit will always be set to a 1 whenever the WDC SFR is written (regardless of value of WDC5 bit). Note 1: The WDC5 bit is set to 0 immediately after power-on (cold start). Figure 1.5.5. WDC register VCR2 register RESET b3 VCC b6 b7 Write to WDC register Internal power on reset VCR1 register Noise rejection Internal reset ("L" active) Internal power supply voltage stable time td(S-R) WARM/COLD (warm or cold start) 1 shot CK CM10 bit = 1 (stop mode) WDC5 bit VDET4 detect signal VC13 bit R S Q Q + + E E > VDET3 ≥ VDET4 |
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