N.

Name

Type

Reset

Status

Function

7

DBOUT/GPIO2

I/O

I

The serial data output for the Debug Port. Can also be used as a GPIO.

8

VDD2

I

–

3.3V core supply.

9

GND2

I

–

Core ground.

10

DBCK/GPIO0

I/O

I

Debug Port Bit Clock/Chip Status 1. The serial clock for the Debug Port

is provided when an input. When an output, provides information about

the chip status. Can also be used as GPIO

11

DBIN/GPIO1

I/O

I

Debug Port Serial Input/Chip Status 0. The serial data input for the

Debug Port is provided when an input. When an output, provides

information about the chip status. Can also be used as GPIO.

12

CLKOUT

O

–

Output Clock.

13

PGND

I

–

PLL Clock Ground Input. Ground connection for oscillator circuit.

14

PVCC

I

–

PLL Clock Power Supply. Positive supply for PLL Clock Oscillator.

15

XTO

O

High

Crystal Oscillator Output. Crystal Oscillator output drive.

16

XTI

I

–

Crystal Oscillator Input. External Clock Input or crystal connection.

17

RESET

I/O

I

System Reset. A logic low level applied to RESET input initializes DSPs.

During Debug Mode if this pin is pulled low in while the DBRQN line is

pulled low then the DSP pointed to by the DBSEL pin will be reset.

18

VDD3

I

–

3.3V Supply.

19

GND3

I

–

Ground.

20

SDI0

I

–

SDI0 is a stereo digital audio data input pin channel 0.

21

SDI1

I

–

SDI1 is a stereo digital audio data input pin channel 1.

22

SDI2

I

–

SDI2 is a stereo digital audio data input pin channel 2.

23

SCKR

I/O

–

SAI receive bit clock. Master or slave.

24

LRCKR

I/O

–

Left-Right clock for SAI Receiver. Master or slave.

25

VDD4

I

–

3.3V Supply.

26

GND4

I

–

Ground.

27

SDO0

O

High

SDO0 is a stereo digital audio data output pin channel 0.

28

SDO1

O

High

SDO1 is a stereo digital audio data output pin channel 1.

29

SDO2

O

High

SDO2 is a stereo digital audio data pin channel 2.

30

VDD5

GND

–

3.3V Supply.

31

GND5

I

–

Ground.

32

LRCKT

I/O

–

SAI transmit left/right clock. Master or slave.

33

SCKT

I/O

–

SAI transmit bit clock. Master or slave.

34

SCL

I/O

–

Clock line for I

35

SDA

I/O

–

Data line for I

36

SCK

I

–

Bit clock for SPI control interface.

37

SS

I

–

Slave select input pin for SPI control interface.

38

MOSI

I/O

I

Serial Data Output for SPI type serial port when in SPI Master Mode and

Serial Data Input when in SPI Slave Mode.

39

MISO

I/O

I

Serial Data Input for SPI style serial port when in SPI Master Mode and

Serial Data Output when in SPI Slave Mode.

40

VDD6

GND

–

3.3V Supply.

41

GND6

I

–

Ground.

42

GPIO3

I/O

–

This pin is dedicated as general I/O.

43

GPIO4

I/O

–

This pin is dedicated as general I/O.

44

GPIO5

I/O

–

This pin is dedicated as general I/O.

PIN DESCRIPTION (continued)

TDA7502

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