RECOMMENDED DC OPERATING CONDITIONS

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit

3.3V Power Supply Voltage

3

3.3

3.6

V

Operating Junction

Temperature

-40

125

°C

POWER CONSUMPTION

Symbol

Parameter

Value

Unit

Maximum current for core power supply @3.3V

250

mA

Note: 50MHz internal DSP clock at Tamb

FUNCTIONAL DESCRIPTION

The TDA7502 contains one DSP Core and asso-

ciated peripherals.

24-BIT DSP CORE.

The DSP core is used to process the converted

analog audio data coming from the CODEC chip

via the SAI and return it for analog conversion.

Functions such as volume, tone, balance, and

fader control, as well as spatial enhancement and

general purpose signal processing may be per-

formed by the DSP.

Some capabilities of the DSPs are listed below:

Single cycle multiply and accumulate with con-

vergent rounding and condition code genera-

tion

2 x 56-bit Accumulators

Double precision multiply

Scaling and saturation arithmetic

48-bit or 2 x 24-bit parallel moves

64 interrupt vector locations

Fast or long interrupts possible

Programmable interrupt priorities and masking

8 each of Address Registers, Address Offset

Registers and Address Modulo Registers

Linear, Reverse Carry, Multiple Buffer Modulo,

Multiple Wrap-around Modulo address arith-

metic

Post-increment or decrement by 1 or by offset,

Index by offset, predecrement address

Repeat instruction and zero overhead DO

loops

Hardware stack capable of nesting combina-

tions of 7 DO loops or 15 interrupts/subrou-

tines

Bit manipulation instructions possible on all

registers and memory locations. Also Jump on

bit test.

4 pin serial debug interface

Debug access to all internal registers, buses

and memory locations

5 word deep program address history FIFO

Hardware and software breakpoints for both

program and data memory accesses

Debug Single stepping, Instruction injection

and Disassembly of program memory

DSP PERIPHERALS

There are a number of peripherals that are tightly

coupled to the DSP Core. Each of the peripherals

are listed below and described in the following

sections.

512 x 24-Bit X-RAM.

512 x 24-Bit Y-RAM.

3072 x 24-Bit Program RAM

128 x 24-Bit Boot ROM.

Serial Audio Interface (SAI)

Single Debug Port

Programmable Control Interface (SPI/I

GPIO

DATA AND PROGRAM MEMORY

Each of the memories are described below.

512 x 24-Bit X-RAM (XRAM)

This is a 512 x 24-Bit Single Port SRAM used for

storing coefficients. The 16-Bit XRAM address,

XABx(15:0) is generated by the Address Genera-

tion Unit of the DSP core. The 24-Bit XRAM Data,

XDBx(23:0), may be written to and read from the

Data ALU of the DSP core. The XDBx Bus is also

connected to the Internal Bus Switch so that it

can be routed to and from all peripheral blocks.

512 x 24 Bit Y-RAM (YRAM)

This is a 512 x 24-Bit Single Port SRAM used for

storing

coefficients.

The

16-Bit

address,

YABx(15:0) is generated by the Address Genera-

tion Unit of the DSP core. The 24-Bit Data,

YDBx(23:0), is written to and read from the Data

TDA7502

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