TDA9110 datasheet(22/29 Pages) STMICROELECTRONICS

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III.2 - EW

EWOUT = 2.5V + K1 (VOUT -VDCOUT)

+K2(VOUT -VDCOUT)

K1 is adjustable by the EW amplitude I

2C register

K2 is adjustable by the Keystone I

2C register

III.3 - DC HSize Output Control

A 7 bits D/A converter is available on Pin 28. The

output is a NPN transistor emitter follower output

with an internal 100mA current source from output

to ground (max. sunk current). The Max. current

the output is able to source is 2.5mA. The output

level is between 0.5V to 4.5V. This DAC can be

used to control the H-Size.

III.4 - Dynamic Horizontal Phase Control

IOUT =K5 (VOUT -VDCOUT)

2 +K6 (VOUT -VDCOUT)

K5 is adjustable by the SidePin Balance I

2C register

K6 is adjustable by the Parallelogram I

2C register

III.5 - Function

When the synchronization pulse is not present, an

internal current source sets the free running fre-

quency. For an external capacitor, COSC = 150nF,

the typical free running frequency is 106Hz.

The typical free running frequency can be calcu-

lated by :

(Hz)= 1.6 e−5 ⋅

COSC

A negative or positive TTL level pulse applied on

Pin 2 (VSYNC) as well as a TTLcomposite synchro

on Pin 1 can synchronize the ramp in the range

[fmin , fmax]. This frequency range depends on the

external capacitor connectedon Pin 22.A capacitor

in the range [150nF, 220nF]

± 5% is recommanded

forapplicationin thefollowing range: 50Hz to 120Hz.

OPERATING DESCRIPTION (continued)

PARABOLA

GENERATOR

SYNCHRO

OSCILLATOR

OSC

CAP

DISCH.

V_SYNC

POLARITY

SAMPLING

SAMP.

CAP

Vlow

Sawth.

Disch.

REF

TRANSCONDUCTANCE

AMPLIFIER

CHARGE CURRENT

23 VERT_OUT

VERT_AMP

SUB05/7bits

VS_AMP

SUB07/6bits

COR_C

SUB08/6bits

S CORRECTION

C CORRECTION

EW_AMP

SUB09/7bits

EW_OUT

EW_CENT

SUB0A/6bits

SPB_AMP

SUB0D/6bits

SPB_OUT

V_FOCUS

PARAL

SUB0E/6bits

Internal Signal to PLL2

Internal Signal added

to H_FOCUS

AMP 6bits

18 BREATH

MOIRE

SUB0C/5bits

POSITION

SUB06/7bits

Figure 21 : Vertical Part Block Diagram

TDA9110

22/29

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