TDA9112 datasheet(37/51 Pages) STMICROELECTRONICS

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TDA9112

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pensation). It is also affected by C- and S-correc-

tions.

The use of both correction waveforms is up to the

application (e.g. dynamic focus).

Figure 14. HVDyCor output horizontal component waveform

9.7 - DC/DC CONTROLLER SECTION

The section is designed to control a switch-mode

DC/DC converter. A switch-mode DC/DC conver-

tor generates a DC voltage from a DC voltage of

different value (higher or lower) with little power

losses. The DC/DC controller is synchronized to

horizontal deflection frequency to minimize poten-

tial interference into the picture.

Its operation is similar to that of standard UC3842.

The schematic diagram of the DC/DC controller is

in Figure 15. The BOut output controls an external

switching circuit (a MOS transistor) delivering

pulses synchronized on horizontal deflection fre-

quency, the phase of which depends on H/W and

I2C bus configuration, see the table at the end of

this chapter. Their duration depends on the feed-

back provided to the circuit, generally a copy of

DC/DC converter output voltage and a copy of cur-

rent passing through the DC/DC converter circuitry

(e.g. current through external power component).

The polarity of the output can be controlled by

BOutPol I2C bus bit. A NPN transistor open-collec-

tor is routed out to the BOut pin.

9.7.1 - External sawtooth configuration

External sawtooth configuration is assumed when

the voltage on BISense pin is lower than VThrBIsConf

threshold. During the operation, a sawtooth is to

be found on pin BISense, generated externally by

the application. The switches S1 and S2 are in

“ext.” position. According to BOutPh I2C bus bit,

the R-S flip-flop is set either at H-drive signal edge

(rising or falling, depending on BOHEdge I

2C bus

bit), or a certain delay (tBTrigDel /TH) after middle

of H-flyback. The output is set On at the end of the

short pulse generated by the monostable trigger.

Timing of reset of the R-S flip-flop affects duty cy-

cle of the output square signal and so the energy

transferred from DC/DC converter input to its out-

put. A reset edge is provided by comparator C3 if

tHVD-Hoffset

VHVD-H

HDyCorPh

VHVD-DC

Shaped H-flyback

(I2C)

tHVD-Hoffset

(min)

(max)

tHVD-Hflat

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