FUNCTIONAL DESCRIPTION (continued)

OSD Inputs

The TDA9203A includes all the circuitry necessary

to mix OSDsignals into the RGB main-picture. Four

pins are dedicated to this function as follow.

Three TTL RGB On Screen Display inputs (Pin 2,

5 and 8). These three inputs are connected to the

three outputs of the corresponding ON-SCREEN-

DISPLAY processor (ex : STV942x).

One Fast Blanking Input (FBLK, Pin 13) which is

also connected to the FBLK output of the same

ON-SCREEN-DISPLAY processor.

When a high level is present on FBLK, the IC will

acts as follow :

- The three main picture RGB input signals are

internally switched to the internal input clamp

reference voltage.

- The three output signals are set to voltages cor-

respondingto the state (0 or 1) on the three OSD

inputs (see Figure 4).

Example :

If FBLK = 1 and OSD1, OSD2, OSD3) = 1, 0, 1

respectively.

BRT is the brightness DC level I

OSD is the On-Screen Display signal value I

Semi-transparent function is controlled thanks to

Bit 6 of R8 register (see Table 1).

When semi-transparent mode is activated, video

signal is divided by 2 (CONT).

Table 1

FBLK OSD1 OSD2 OSD3 B6R8

Output

Signal (OUTn)

0

x

x

x

0

Video

1

x

x

x

0

OSD (1)

0

x

x

x

1

Video

1

0

x

x

1

OSD

1x

1x

1

OSD

1

xx0

1

OSD

1

1

0

1

1

Semi-trans-

parent (2)

Notes : 1. All OSD colors are displayed.

2. One OSD color is displayed as semi-transparent video

without effect on brightness and DC level adjustment.

Output Stage

The three output stagesincorporate threefunctions

which are :

- The blanking stage : When high level is applied

to the BLK input (Pin 14), the three outputs are

switched to a voltage which is 400mV lower than

the BLACK level. The black level is the output

voltage with minimum brightness when input sig-

nal video amplitude is equal to ”0”.

- The output stage itself : It is a large bandwidth

on the three outputs (for 0.7V video signal on the

inputs).

- The output CLAMP : The IC also incorporates

three internal output clamp (sample and hold

system) which allow to DC shift the three output

signals. The DC output voltage is adjustable

through I

The overall waveforms of the output signal accord-

ing to the different adjustment are shown in Fig-

ures 4 and 5.

Serial Interface

The 2-wires serial interface is an I

The slave address of the TDA9203A is DC (in

hexadecimal).

A6

A5

A4

A3

A2

A1

A0

W

110

111

00

Data Transfer

The host MCU can write data into the TDA9203A

registers. Read mode is not available.

To write data into the TDA9203A, after a start, the

MCU must send (see Figure 6) :

- The I

R/W bit.

- The byte of the internal register address where

the MCU wants to write data(s).

- The data.

All bytes are sent MSB bit first and the write data

transter is closed by a stop.

TDA9203A

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