MPC8640D datasheet(39/140 Pages) FREESCALE

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MPC8640 and MPC8640D Integrated Host Processor Hardware Specifications, Rev. 1

Freescale Semiconductor

Ethernet: Enhanced Three-Speed Ethernet (eTSEC), MII Management

Figure 19 shows the RGMII and RTBI AC timing and multiplexing diagrams.

Figure 19. RGMII and RTBI AC Timing and Multiplexing Diagrams

8.2.7

RMII AC Timing Specifications

This section describes the RMII transmit and receive AC timing specifications.

8.2.7.1

RMII Transmit AC Timing Specifications

The RMII transmit AC timing specifications are in Table 35.

Table 35. RMII Transmit AC Timing Specifications

At recommended operating conditions with L/TVDD of 3.3 V ± 5%.

Parameter/Condition

Symbol 1

Min

Typ

Max

Unit

REF_CLK clock period

tRMT

20.0

REF_CLK duty cycle

tRMTH/tRMT

REF_CLK peak-to-peak jitter

tRMTJ

—

250

Rise time REF_CLK (20%–80%)

tRMTR

1.0

—

2.0

Fall time REF_CLK (80%–20%)

tRMTF

1.0

—

2.0

GTX_CLK

tRGT

tRGTH

tSKRGT

TX_CTL

TXD[8:5]

TXD[7:4]

TXD[9]

TXERR

TXD[4]

TXEN

TXD[3:0]

(At Transmitter)

TXD[8:5][3:0]

TXD[7:4][3:0]

TX_CLK

(At PHY)

RX_CTL

RXD[8:5]

RXD[7:4]

RXD[9]

RXERR

RXD[4]

RXDV

RXD[3:0]

RXD[8:5][3:0]

RXD[7:4][3:0]

RX_CLK

(At PHY)

tSKRGT

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