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LPC2292 数据表(PDF) 2 Page - NXP Semiconductors |
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LPC2292 数据表(HTML) 2 Page - NXP Semiconductors |
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2 / 53 page ![]() LPC2292_2294_7 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 7 — 4 December 2008 2 of 53 NXP Semiconductors LPC2292/LPC2294 16/32-bit ARM microcontrollers with external memory interface I 16 kB on-chip static RAM and 256 kB on-chip flash program memory. 128-bit wide interface/accelerator enables high-speed 60 MHz operation. I In-System Programming/In-Application Programming (ISP/IAP) via on-chip bootloader software. Single flash sector or full chip erase in 400 ms and programming of 256 B in 1 ms. I EmbeddedICE-RT and Embedded Trace interfaces offer real-time debugging with the on-chip RealMonitor software as well as high-speed real-time tracing of instruction execution. I Two/four (LPC2292/LPC2294) interconnected CAN interfaces with advanced acceptance filters. Additional serial interfaces include two UARTs (16C550), Fast I2C-bus (400 kbit/s) and two SPIs. I Eight channel 10-bit ADC with conversion time as low as 2.44 µs. I Two 32-bit timers (with four capture and four compare channels), PWM unit (six outputs), Real-Time Clock (RTC), and watchdog. I Vectored Interrupt Controller (VIC) with configurable priorities and vector addresses. I Configurable external memory interface with up to four banks, each up to 16 MB and 8/16/32-bit data width. I Up to 112 general purpose I/O pins (5 V tolerant). Up to nine edge/level sensitive external interrupt pins available. I 60 MHz maximum CPU clock available from programmable on-chip PLL with settling time of 100 µs. I The on-chip crystal oscillator should have an operating range of 1 MHz to 25 MHz. I Power saving modes include Idle and Power-down. I Processor wake-up from Power-down mode via external interrupt. I Individual enable/disable of peripheral functions for power optimization. I Dual power supply: N CPU operating voltage range of 1.65 V to 1.95 V (1.8 V ± 0.15 V). N I/O power supply range of 3.0 V to 3.6 V (3.3 V ± 10 %) with 5 V tolerant I/O pads. 3. Ordering information Table 1. Ordering information Type number Package Name Description Version LPC2292FBD144 LQFP144 plastic low profile quad flat package; 144 leads; body 20 × 20 × 1.4 mm SOT486-1 LPC2292FBD144/00 LQFP144 plastic low profile quad flat package; 144 leads; body 20 × 20 × 1.4 mm SOT486-1 LPC2292FBD144/01 LQFP144 plastic low profile quad flat package; 144 leads; body 20 × 20 × 1.4 mm SOT486-1 LPC2292FET144/00 TFBGA144 plastic thin fine-pitch ball grid array package; 144 balls; body 12 × 12 × 0.8 mm SOT569-2 LPC2292FET144/01 TFBGA144 plastic thin fine-pitch ball grid array package; 144 balls; body 12 × 12 × 0.8 mm SOT569-2 LPC2292FET144/G TFBGA144 plastic thin fine-pitch ball grid array package; 144 balls; body 12 × 12 × 0.8 mm SOT569-2 |
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