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LPC2292 数据表(PDF) 21 Page - NXP Semiconductors

部件名 LPC2292
功能描述  16/32-bit ARM microcontrollers; 256 kB ISP/IAP flash with CAN, 10-bit ADC and external memory interface
PDF  53 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

LPC2292 数据表(HTML) 21 Page - NXP Semiconductors

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LPC2292_2294_7
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 7 — 4 December 2008
21 of 53
NXP Semiconductors
LPC2292/LPC2294
16/32-bit ARM microcontrollers with external memory interface
capability to both receive and send information (such as memory). Transmitters and/or
receivers can operate in either master or slave mode, depending on whether the chip has
to initiate a data transfer or is only addressed. The I2C-bus is a multi-master bus, it can be
controlled by more than one bus master connected to it.
The I2C-bus implemented in LPC2292/LPC2294 supports bit rate up to 400 kbit/s (Fast
I2C-bus).
6.12.1 Features
Compliant with standard I2C-bus interface.
Easy to configure as master, slave, or master/slave.
Programmable clocks allow versatile rate control.
Bidirectional data transfer between masters and slaves.
Multi-master bus (no central master).
Arbitration between simultaneously transmitting masters without corruption of serial
data on the bus.
Serial clock synchronization allows devices with different bit rates to communicate via
one serial bus.
Serial clock synchronization can be used as a handshake mechanism to suspend and
resume serial transfer.
The I2C-bus may be used for test and diagnostic purposes.
6.13 SPI serial I/O controller
The LPC2292/LPC2294 each contain two SPIs. The SPI is a full duplex serial interface,
designed to be able to handle multiple masters and slaves connected to a given bus. Only
a single master and a single slave can communicate on the interface during a given data
transfer. During a data transfer the master always sends a byte of data to the slave, and
the slave always sends a byte of data to the master.
6.13.1 Features
Compliant with Serial Peripheral Interface (SPI) specification.
Synchronous, Serial, Full Duplex communication.
Combined SPI master and slave.
Maximum data bit rate of 1
8 of the input clock rate.
6.13.2 Features available in LPC2292/LPC2294/01 only
Eight to 16 bits per frame.
When the SPI interface is used in Master mode, the SSELn pin is not needed (can be
used for a different function).



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