数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

TDF8599 数据表(PDF) 8 Page - NXP Semiconductors

部件名 TDF8599
功能描述  I2C-bus controlled dual channel 43 W/2 W single channel 85 W/1 W class-D power amplifier with load diagnostics
PDF  52 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

TDF8599 数据表(HTML) 8 Page - NXP Semiconductors

Back Button TDF8599 Datasheet HTML 4Page - NXP Semiconductors TDF8599 Datasheet HTML 5Page - NXP Semiconductors TDF8599 Datasheet HTML 6Page - NXP Semiconductors TDF8599 Datasheet HTML 7Page - NXP Semiconductors TDF8599 Datasheet HTML 8Page - NXP Semiconductors TDF8599 Datasheet HTML 9Page - NXP Semiconductors TDF8599 Datasheet HTML 10Page - NXP Semiconductors TDF8599 Datasheet HTML 11Page - NXP Semiconductors TDF8599 Datasheet HTML 12Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 8 / 52 page
background image
TDF8599_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 13 November 2008
8 of 52
NXP Semiconductors
TDF8599
Class-D power amplifier with load diagnostics
[1]
X = do not care
8.3 Pulse-width modulation frequency
The output signal from the amplifier is a PWM signal with a switching frequency of fosc.
This frequency is set by connecting a resistor (Rosc) between pins OSCSET and AGND.
The optimal clock frequency setting is between 300 kHz and 400 kHz. Connecting a
resistor with a value of 39 k
Ω, for example, sets the clock frequency to 320 kHz. The
external capacitor (Cosc) has no influence on the oscillator frequency. It does however,
reduce jitter and sensitivity to disturbance. Using a 2nd order LC demodulation filter in the
application generates an analog audio signal across the loudspeaker.
8.3.1 Master and slave mode selection
In a master and slave configuration, multiple TDF8599 devices are daisy-chained together
in one audio application with a single device providing the clock frequency signal for the
other devices. In this situation, it is recommended that the oscillators of all devices are
synchronized for optimum EMI behavior as follows:
All OSCIO pins are connected together and one TDF8599 in the application is configured
as the clock-master. All other TDF8599 devices are configured as clock-slaves (see
Figure 6).
The clock-master pin OSCIO is configured as the oscillator output. When a resistor
(Rosc) is connected between pins OSCSET and AGND, the TDF8599 is in Master
mode.
The clock-slave pins OSCIO are configured as the oscillator inputs. When pin
OSCSET is directly connected to pin AGND (see Table 6), the TDF8599 is in Slave
mode.
Table 4.
I2C-bus mode operation
Pin EN
Bit IB1[D0]
Bit IB2[D0]
Mode
S2 closed
1
0
Operating mode
1
1
Mute mode
0X[1]
Standby mode
S2 open
X[1]
X[1]
off
Table 5.
Non-I2C-bus mode operation
Pin EN
Bit IB2[D0]
Mode
S2 closed
S1 open
Operating mode
S2 closed
Mute mode
S2 open
do not care
off
Table 6.
Mode setting OSCIO
Mode
Settings
Pin OSCSET
Pin OSCIO
Master
Rosc > 26 kΩ
output
Slave
Rosc =0kΩ; shorted to AGND
input



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com