LPC2921 datasheet(39/81 Pages) PHILIPS

39 / 81 page

LPC2921_2923_2925_0

Preliminary data sheet

Rev. 00.01 — 24 October 2008

39 of 81

NXP Semiconductors

LPC2921/2923/2925

ARM9 microcontroller with CAN and LIN

6.14.5.5

Clock description

The PWM modules are clocked by CLK_MSCSS_PWMx (x = 0 - 3), see Section 6.7.2.

Note that each PWM has its own CLK_MSCSS_PWMx branch clock for power

management. The frequency of all these clocks is identical to CLK_MSCSS_APB since

they are derived from the same base clock BASE_MSCSS_CLK.

Also note that unlike the timer modules in the Peripheral SubSystem, the actual timer

counter registers of the PWM modules run at the same clock as the APB system interface

CLK_MSCSS_APB. This clock is independent of the AHB system clock.

If a PWM module is not used its CLK_MSCSS_PWMx branch clock can be switched off.

6.14.6 Timers in the MSCSS

The two timers in the MSCSS are functionally identical to the timers in the peripheral

subsystem, see Section 6.12.3. The features of the timers in the MSCSS are the same as

the timers in the peripheral subsystem, but the capture inputs and match outputs are not

available on the device pins. These signals are instead connected to the ADC and PWM

modules as outlined in the description of the MSCSS, see Section 6.14.1.

See section Section 6.12.3 for a functional description of the timers.

6.14.6.1

Pin description

MSCSS timer 0 has no external pins.

MSCSS timer 1 has a PAUSE pin available as external pin. The PAUSE pin is combined

with other functions on the port pins of the LPC2921/2923/2925. Table 22 shows the

MSCSS timer 1 external pin.

6.14.6.2

Clock description

The Timer modules in the MSCSS are clocked by CLK_MSCSS_MTMRx (x = 0 to 1), see

Section 6.7.2. Note that each timer has its own CLK_MSCSS_MTMRx branch clock for

power management. The frequency of all these clocks is identical to CLK_MSCSS_APB

since they are derived from the same base clock BASE_MSCSS_CLK.

Note that, unlike the timer modules in the Peripheral SubSystem, the actual timer counter

registers run at the same clock as the APB system interface CLK_MSCSS_APB. This

clock is independent of the AHB system clock.

If a timer module is not used its CLK_MSCSS_MTMRx branch clock can be switched off.

6.14.7 Quadrature Encoder Interface (QEI)

A quadrature encoder, also known as a 2-channel incremental encoder, converts angular

displacement into two pulse signals. By monitoring both the number of pulses and the

relative phase of the two signals, the user can track the position, direction of rotation, and

velocity. In addition, a third channel, or index signal, can be used to reset the position

counter. The quadrature encoder interface decodes the digital pulses from a quadrature

encoder wheel to integrate position over time and determine direction of rotation. In

addition, the QEI can capture the velocity of the encoder wheel.

Table 22.

MSCSS timer 1 pin

Symbol

Direction

Description

MSCSS PAUSE

pause pin for MSCSS timer 1

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