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LPC2921 数据表(PDF) 21 Page - NXP Semiconductors |
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LPC2921 数据表(HTML) 21 Page - NXP Semiconductors |
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21 / 81 page ![]() LPC2921_2923_2925_0 © NXP B.V. 2008. All rights reserved. Preliminary data sheet Rev. 00.01 — 24 October 2008 21 of 81 NXP Semiconductors LPC2921/2923/2925 ARM9 microcontroller with CAN and LIN 6.10.2 Pin description 6.10.3 Clock description Access to the USB registers is clocked by the CLK_SYS_USB, derived from BASE_SYS_CLK, see Section 6.7.2. The CGU1 provides an independent base clock to the USB block, BASE_USB_CLK (see Section 6.15.3). Table 11. USB device port pins Pin name Direction Description USB_VBUS I USB_VBUS status input. When this function is not enabled via its corresponding PINSEL register, it is driven HIGH internally. USB_D+ I/O Positive differential data USB_D − I/O Negative differential data USB_CONNECT O SoftConnect control signal USB_UP_LED O GoodLink LED control signal |
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