WARP20 datasheet(6/28 Pages) STMICROELECTRONICS

6 / 28 page

FUNCTIONAL DESCRIPTION

W.A.R.P.2.0 works in two mode depending on the

OFL control signal level (see table 3) :

Off-line MODE (OFL High)

On-line MODE (OFL Low)

OFF-LINE MODE

All W.A.R.P. memories are loaded during the Off-

Line phase. The membership functions are written

inside their related memories and the process con-

trol rules are loaded inside the PCM.

The addresses of the words to be written in the

memories, are internally generated while the ad-

dresses of the external memory locations to be

read are directly provided by W.A.R.P.2.0 by means

of O0-O11 output pins.

Data must be loaded 8 bit a time in the data bus

and can be read from an external non volatile

memory or loaded by an host processor.

The Off-Line phase can be performed automat-

ically (see figure 4) or manually (see figure 5).

When the auto-boot is chosen (AUTO = High) it is

possible to configure the reading access time of the

external memory. The auto-boot end is indicated by

the ENDOFL signal.

The downloading phase requires:

F*NWordsDatabase clock pulses,

where F is 16 or 32 (see table 2).

NWordsDatabase is the number of words stored in

the boot-memory (see register bench description,

table 5).

When the manual-boot is chosen (AUTO = Low)

data have to be provided by using the handshaking

signals (RD/READY). In this way it is possible to

update only a portion of the database or change the

processor configuration.

The time required from the manual boot depends

on the efficiency of the communication handled

with the handshaking signals.

W.A.R.P.2.0

BOOT

MEMORY

OFL

AUTO

ENDOFL

I0-I7

O0-O11

SIS0-SIS2

Auto-Boot Enable

AUTO=HIGH

Off-line Phase Enable

OFL=HIGH

OFFLINE PHASE ENDS

ENDOFL=HIGH

External Memory

Access Time SETTING

SIS0-SIS2=LowLow...

Downloading From

External Memory

Figure 4. Off-Line phase: Auto-Boot

Manual-Boot Enable

AUTO=LOW

Off-line Phase Enable

OFL=HIGH

OFFLINE PHASE ENDS

Downloading with

Handshaking Signals

RD/READY

W.A.R.P.2.0

BOOT

MEMORY

OFL

AUTO

READY

I0-I7

O0-O11

Figure 5. Off-Line Phase: Slave Downloading

6/28

W.A.R.P.2.0

WARP20 数据表(PDF) 6 Page - STMicroelectronics

WARP20 数据表(HTML) 6 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

数据表下载

链接网址

WARP20 数据表(PDF) 6 Page - STMicroelectronics

WARP20 数据表(HTML) 6 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

数据表 下载

链接网址

数据表下载