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LTC1702AIGN 数据表(PDF) 18 Page - Linear Technology |
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LTC1702AIGN 数据表(HTML) 18 Page - Linear Technology |
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18 / 36 page ![]() 18 LTC1702A 1702afa APPLICATIONS INFORMATION Calculating RMS Current in CIN A buck regulator like the LTC1702A draws pulses of current from the input capacitor during normal opera- tion. The input capacitor sees this as AC current, and dissipates power proportional to the RMS value of the input current waveform. To properly specify the capaci- tor, we need to know the RMS value of the input current. Calculating the approximate RMS value of a pulse train with a fixed duty cycle is straightforward, but the LTC1702A complicates matters by running two sides simultaneously and out of phase, creating a complex waveform at the input. To calculate the approximate RMS value of the input current, we first need to calculate the average DC value with both sides of the LTC1702A operating at maximum load. Over a single period, the system will spend some time with one top switch on and the other off, perhaps some time with both switches on, and perhaps some time with both switches off. During the time each top switch is on, the current will equal that side’s full load output current. When both switches are on, the total current will be the sum of the two full load currents, and when both are off, the current is effectively zero. Multiply each current value by the percentage of the period that the current condition lasts, and sum the results—this is the average DC current value. As an example, consider a circuit that takes a 5V input and generates 3.3V at 3A at side 1 and 1.6V at 10A at side 2. When a cycle starts, TG1 turns on and 3A flows TIME 0A B C D 50% 16% 16% 18% IAVE 0 5.2 3 10 13 1702A SB1 Figure SB1. Average Current Calculation implies a duty cycle of 32%, which means QT is on 32% of each switching cycle. During QT’s on-time, the current drawn from the input equals the load current and during the rest of the cycle, the current drawn from the input is near zero. This 0A to 10A, 32% duty cycle pulse train adds up to 4.7ARMS at the input. At 550kHz, switching cycles last about 1.8 µs—most system logic supplies have no hope of regulating output current with that kind of speed. A local input bypass capacitor is required to make up the difference and prevent the input supply from dropping drastically when QT kicks on. This capacitor is usually chosen for RMS ripple current capability and ESR as well as value. The input bypass capacitor in an LTC1702A circuit is common to both channels. Consider our 10A example case with the other side of the LTC1702A disabled. The input bypass capacitor gets exercised in three ways: its ESR must be low enough to keep the initial drop as QT turns on within reason (100mV or so); its RMS current capability must be adequate to withstand the 4.6ARMS ripple current at the input and the capacitance must be large enough to maintain the input voltage until the input supply can make up the difference. Generally, a capacitor that meets the first two parameters will have far more capacitance than is required to keep capacitance-based droop under control. In our example, we need 0.01 Ω ESR to keep the input drop under 100mV with a 10A current step and 4.6ARMS ripple current capacity to avoid over- heating the capacitor. These requirements can be met with multiple low ESR tantalum or electrolytic capacitors in parallel, or with a large monolithic ceramic capacitor. The two sides of the LTC1702A run off a single master clock and are wired 180 ° out of phase with each other to significantly reduce the total capacitance/ESR needed at the input. Assuming 100mV of ripple and 10A output current, we needed an ESR of 0.01 Ω and 4.7A ripple current capability for one side. Now, assume both sides are running simultaneously with identical loading. If the two sides switched in phase, all the loading conditions would double and we’d need enough capacitance for 9.4ARMS and 0.005Ω ESR. With the two sides out of phase, the input current is 4.8ARMS—barely larger than the single case (Figure 7)! The peak current deltas are still only 10A, requiring the same 0.01 Ω ESR rating. As long as |
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