LTC1702AIGN datasheet(30/36 Pages) LINER

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LTC1702A

1702afa

APPLICATIONS INFORMATION

Making L smaller than this optimum value yields little or no

improvement in transient response. As the output voltage

recovers, the inductor current will briefly rise above the

level of the output current to replenish the charge lost from

the output capacitor. With a properly compensated loop,

the entire recovery time will be inside of 10

µs.

Most loads care only about the maximum deviation from

ideal, which occurs somewhere in the first two cycles after

the load step hits. During this time, the output capacitor

does all the work until the inductor and control loop regain

control. The initial drop (or rise if the load steps down) is

entirely controlled by the ESR of the capacitor and amounts

to most of the total voltage drop. To minimize this drop,

reduce the ESR as much as possible by choosing low ESR

capacitors and/or paralleling multiple capacitors at the

output. The capacitance value accounts for the rest of the

voltage drop until the inductor current rises. With most

output capacitors, several devices paralleled to get the

ESR down will have so much capacitance that this drop

term is negligible. Ceramic capacitors are an exception; a

small ceramic capacitor can have suitably low ESR with

relatively small values of capacitance, making this second

drop term significant.

Optimizing Loop Compensation

Loop compensation has a fundamental impact on tran-

sient recovery time, the time it takes the LTC1702A to

recover after the output voltage has dropped due to output

capacitor ESR. Optimizing loop compensation entails

maintaining the highest possible loop bandwidth while

ensuring loop stability. The Feedback Component Selec-

tion section describes in detail how to design an optimized

feedback loop, appropriate for most LTC1702A systems.

Voltage Positioning

If the load transients consist primarily of load steps from

near zero load to full load and back, the transient response

can be traded off against DC regulation performance by

using a technique known as “voltage positioning.” The

goal is to intentionally compromise the DC regulation loop

such that the output rides near the maximum allowable

value (often +5%) with no load and near the minimum

allowable value at maximum load. With the load at zero,

any transient that comes along will be a current increase

which will cause the output voltage to fall. Since the output

voltage is initially at a high value, it can fall further before

LTC1702A

1702 F17a

1702A F17b

VOUT

VIN

+5%

–5%

NOM

MAX

VOUT

LOAD

CURRENT

MAXIMUM

ALLOWABLE

TRANSIENT

Figure 17a. Standard Regulator

Figure 17b. Standard Regulator—Transient Response

LTC1702A

1702A F17c

1702A F17d

VOUT

VIN

+5%

–5%

NOM

MAX

VOUT

LOAD

CURRENT

Figure 17c. Voltage Positioning Regulator

Figure 17d. Positioning Regulator—Transient Response

MAXIMUM

ALLOWABLE

TRANSIENT

≈2× FIGURE 17b

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