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TMS320UC5409 数据表(PDF) 9 Page - Texas Instruments |
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TMS320UC5409 数据表(HTML) 9 Page - Texas Instruments |
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9 / 74 page ![]() TMS320UC5409 FIXED-POINT DIGITAL SIGNAL PROCESSOR SPRS101A – APRIL 1999 – REVISED AUGUST 1999 9 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 Terminal Functions (Continued) TERMINAL NAME DESCRIPTION I/O† TERMINAL NAME DESCRIPTION I/O† TEST PINS (CONTINUED) EMU0 I/O/Z Emulator 0 pin. When TRST is driven low, EMU0 must be high for activation of the OFF condition. When TRST is driven high, EMU0 is used as an interrupt to or from the emulator system and is defined as input/output by way of the IEEE standard 1149.1 scan system. EMU1/OFF I/O/Z Emulator 1 pin/disable all outputs. When TRST is driven high, EMU1/OFF is used as an interrupt to or from the emulator system and is defined as input/output by way of the IEEE standard 1149.1 scan system. When TRST is driven low, EMU1/OFF is configured as OFF. The EMU1/OFF signal, when active low, puts all output drivers into the high-impedance state. Note that OFF is used exclusively for testing and emulation purposes (not for multiprocessing applications). Therefore, for the OFF feature, the following apply: TRST = low EMU0 = high EMU1/OFF = low † I = Input, O = Output, Z = High-impedance, S = Supply memory The ’UC5409 device provides both on-chip ROM and RAM memories to aid in system performance and integration. on-chip ROM with bootloader The ’5409 features a 16K-word × 16-bit on-chip maskable ROM. Customers can arrange to have the ROM of the ’5409 programmed with contents unique to any particular application. A security option is available to protect a custom ROM. This security option is described in the TMS320C54x DSP CPU and Peripherals Reference Set, Volume 1 (literature number SPRU131). Note that only the ROM security option, and not the ROM/RAM option, is available on the ’5409 . A bootloader is available in the standard ’5409 on-chip ROM. This bootloader can be used to automatically transfer user code from an external source to anywhere in the program memory at power up. If the MP/MC pin is sampled low during a hardware reset, execution begins at location FF80h of the on-chip ROM. This location contains a branch instruction to the start of the bootloader program. The standard ’5409 bootloader provides different ways to download the code to accomodate various system requirements: D Parallel from 8-bit or 16-bit-wide EPROM D Parallel from I/O space 8-bit or 16-bit mode D Serial boot from serial ports 8-bit or 16-bit mode D Host-port interface boot D SPI serial EEPROM 8-bit boot mode |
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