November 2006

ASM2P2310A

rev 0.3

2.5-V TO 3.3-V High-Performance Clock Buffer

7 of 11

Notice: The information in this document is subject to change without notice.

Parameter Measurement Information

Figure 2. Test Load Circuit

Figure 3. Voltage Waveforms Propagation Delay Times

Figure 4. Output Skew

0 V

CLK

Any Y

Any Y

CLK

1.7V or 2V

0.4V

0.4V

0 V

500Ω

From Output

Under Test