STA2064

System description

Doc ID 16057 Rev 1

7/19

2.4.2

DDR-SDRAM controller

The SDRAM controller has been designed to support up to 1Gbit over each of the two chip

selects (or up to 2 Gbit over a single chip select) of:

●

LP DDR-SDRAM

●

DDR2

The memory data bus will be 16 or 32-bit wide for LP DDR-SDRAM memories (under

software control). This same configuration is also supported for DDR2 type of memories,

with two 16-bit devices per chip select.

2.5

Audio/video functions

2.5.1

C3

It is composed of CD-ROM Decoder Block, responsible for performing sector descrambling

Form1, and Data Filter block supporting frame data filtering and different block layout

organization possibilities. The C3 block can take its input data directly from SPDIF or from

the memory space, and delivers back its output data to memory, supporting DMA requests.

2.5.2

Sample rate converter (SaRaC)

This block offers a fully digital stereo asynchronous sample rate conversion, using an

automatic Digital Ratio Locked Loop. Its main features are:

–

Up to 20-bit input and 22-bit output sample size

–

DMA optimized 16-bit stereo sample interface

–

Input sample rate from selectable MSP or SPDIF interface (32 kHz to 48 kHz)

–

Output sample rate from selectable MSP interface (44.1 kHz to 48 kHz)

–

Internally generated input sample rate (8 kHz to 48 kHz) for compressed audio

decoding

2.5.3

JPEG decoder

The JPEG decoder block performs Baseline DCT sequential decoding up to 16Mpix/sec.

JPEG compressed thumbnails are also supported.

2.5.4

Smart graphic accelerator (SGA)

The smart graphic accelerator (SGA) provides an efficient 2D and 3D primitive drawing tool

that breaks down the MIPS and power consumption concerns of pixel processing.

2.5.5

Color LCD controller (CLCD)

This interface drives LCD panels. It supports single or dual-panel color and monochrome

STN displays and color TFT or HR-TFT displays. The resolution can be 1, 2 or 4 bits-

perpixel (bpp) palletized for mono STN, 1, 2, 4 or 8 bpp palletized for color STN and TFT,

16-bpp true-color non palletized for Color STN and TFT, 18-bpp packed or not packed

truecolor non pallettized for color TFT. It also offers Frame Modulation to deliver enhanced

colors on 12, 16 or 18 bits (HR-) TFT panels from up to 18-bpp format.