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LTM4609EVPBF 数据表(PDF) 3 Page - Linear Technology

部件名 LTM4609EVPBF
功能描述  36VIN, 34VOUT High Effi ciency Buck-Boost DC/DC 關Module
PDF  24 Pages
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制造商  LINER [Linear Technology]
网页  http://www.linear.com
标志 LINER - Linear Technology

LTM4609EVPBF 数据表(HTML) 3 Page - Linear Technology

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LTM4609
3
4609fa
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the –40°C to 85°C
temperature range, otherwise specifications are at TA = 25°C, VIN = 12V. Per typical application (front page) configuration.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Output Specifications
IOUTDC
Output Continuous Current Range
(See Output Current Derating Curves
for Different VIN, VOUT and TA)
VIN = 32V, VOUT = 12V
VIN = 6V, VOUT = 12V
10
4
A
A
ΔVFB/VFB(NOM)
Reference Voltage Line Regulation
Accuracy
VIN = 4.5V to 36V, VCOMP = 1.2V (Note 4)
0.002
0.02
%/V
ΔVFB/VFB(LOAD)
Load Regulation Accuracy
VCOMP = 1.2V to 0.7V
VCOMP = 1.2V to 1.8V (Note 4)
l
l
0.15
–0.15
0.5
–0.5
%
%
Switch Section
M1 tr
Turn-On Time (Note 5)
Drain to Source Voltage VDS = 12V,
Bias Current ISW = 10mA
50
ns
M1 tf
Turn-Off Time
Drain to Source Voltage VDS = 12V,
Bias Current ISW = 10mA
40
ns
M3 tr
Turn-On Time
Drain to Source Voltage VDS = 12V,
Bias Current ISW = 10mA
25
ns
M3 tf
Turn-Off Time
Drain to Source Voltage VDS = 12V,
Bias Current ISW = 10mA
20
ns
M2, M4 tr
Turn-On Time
Drain to Source Voltage VDS = 12V,
Bias Current ISW = 10mA
20
ns
M2, M4 tf
Turn-Off Time
Drain to Source Voltage VDS = 12V,
Bias Current ISW = 10mA
20
ns
t1d
M1 Off to M2 On Delay (Note 5)
Drain to Source Voltage VDS = 12V,
Bias Current ISW = 10mA
50
ns
t2d
M2 Off to M1 On Delay
Drain to Source Voltage VDS = 12V,
Bias Current ISW = 10mA
50
ns
t3d
M3 Off to M4 On Delay
Drain to Source Voltage VDS = 12V,
Bias Current ISW = 10mA
50
ns
t4d
M4 Off to M3 On Delay
Drain to Source Voltage VDS = 12V,
Bias Current ISW = 10mA
50
ns
Mode Transition 1
M2 Off to M4 On Delay
Drain to Source Voltage VDS = 12V,
Bias Current ISW = 10mA
220
ns
Mode Transition 2
M4 Off to M2 On Delay
Drain to Source Voltage VDS = 12V,
Bias Current ISW = 10mA
220
ns
M1 RDS(ON)
Static Drain-to-Source
On-Resistance
Bias Current ISW = 3A
10
mΩ
M2 RDS(ON)
Static Drain-to-Source
On-Resistance
Bias Current ISW = 3A
14
20
mΩ
M3 RDS(ON)
Static Drain-to-Source
On-Resistance
Bias Current ISW = 3A
14
20
mΩ
M4 RDS(ON)
Static Drain-to-Source
On-Resistance
Bias Current ISW = 3A
14
20
mΩ
Oscillator and Phase-Locked Loop
fNOM
Nominal Frequency
VPLLFLTR = 1.2V
260
300
330
kHz
fLOW
Lowest Frequency
VPLLFLTR = 0V
170
200
220
kHz
fHIGH
Highest Frequency
VPLLFLTR = 2.4V
340
400
440
kHz
RPLLIN
PLLIN Input Resistance
50
kΩ
IPLLFLTR
Phase Detector Output Current
fPLLIN < fOSC
fPLLIN > fOSC
–15
15
μA
μA



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