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CDK2000 数据表(PDF) 1 Page - Cirrus Logic |
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CDK2000 数据表(HTML) 1 Page - Cirrus Logic |
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1 / 24 page ![]() Copyright Cirrus Logic, Inc. 2009 (All Rights Reserved) http://www.cirrus.com Fractional-N Frequency Synthesizer Features Delta-Sigma Fractional-N Frequency Synthesis – Generates a Low Jitter 6 - 75 MHz Clock Relative to 8 - 75 MHz Reference Clock Highly Accurate PLL Multiplication Factor – Maximum Error Less Than 1 PPM One-Time Programmability – Configurable Hardware Control Pins – Configurable Auxiliary Output Flexible Sourcing of Reference Clock – External Oscillator or Clock Source – Supports Inexpensive Local Crystal Minimal Board Space Required – No External Analog Loop-filter Components General Description The CS2200-OTP is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2200-OTP is based on an analog PLL ar- chitecture comprised of a Delta-Sigma Fractional-N Frequency Synthesizer. This architecture allows for fre- quency synthesis and clock generation from a stable reference clock. The CS2200-OTP has many configura- tion options which are set once prior to runtime. At runtime there are three hardware configuration pins available for mode and feature selection. The CS2200-OTP is available in a 10-pin MSOP pack- age in Commercial (-10°C to +70°C) grade. Customer development kits are also available for custom device prototyping, small production programming, and device evaluation. Please see “Ordering Information” on page 23 for complete details. Auxiliary Output 6 to 75 MHz PLL Output 3.3 V 8 MHz to 75 MHz Low-Jitter Timing Reference Output to Input Clock Ratio N Timing Reference PLL Output PLL Lock Indicator Fractional-N Divider Voltage Controlled Oscillator Internal Loop Filter Phase Comparator Delta-Sigma Modulator Hardware Configuration Hardware Control AUG '09 DS842F1 CS2200-OTP |
类似零件编号 - CDK2000 |
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类似说明 - CDK2000 |
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