STM32F103CBU6TR datasheet(89/92 Pages) STMICROELECTRONICS

89 / 92 page

STM32F103x8, STM32F103xB

Revision history

Doc ID 13587 Rev 11

89/92

14-Mar-2008

Figure 2: Clock tree on page 20 added.

Maximum TJ value given in Table 8: Thermal characteristics on

page 35.

CRC feature added (see CRC (cyclic redundancy check) calculation

unit on page 9 and Figure 9: Memory map on page 31 for address).

IDD modified in Table 16: Typical and maximum current consumptions in

Stop and Standby modes.

ACCHSI modified in Table 24: HSI oscillator characteristics on page 52,

note 2 removed.

PD, TA and TJ added, tprog values modified and tprog description clarified

in Table 28: Flash memory characteristics on page 53.

tRET modified in Table 29: Flash memory endurance and data retention.

VNF(NRST) unit corrected in Table 37: NRST pin characteristics on

page 60.

Table 41: SPI characteristics on page 64 modified.

IVREF added to Table 45: ADC characteristics on page 68.

Table 47: ADC accuracy - limited test conditions added. Table 48: ADC

accuracy modified.

LQFP100 package specifications updated (see Section 6: Package

characteristics on page 73).

Recommended LQFP100, LQFP 64, LQFP48 and VFQFPN36

footprints added (see Figure 40, Figure 42, Figure 46 and Figure 36).

Section 6.2: Thermal characteristics on page 82 modified,

Section 6.2.1 and Section 6.2.2 added.

Appendix A: Important notes on page 81 removed.

21-Mar-2008

Small text changes. Figure 9: Memory map clarified.

In Table 29: Flash memory endurance and data retention:

–NEND tested over the whole temperature range

– cycling conditions specified for tRET

–tRET min modified at TA = 55 °C

V25, Avg_Slope and TL modified in Table 49: TS characteristics.

CRC feature removed.

22-May-2008

CRC feature added back. Small text changes. Section 1: Introduction

modified. Section 2.2: Full compatibility throughout the family added.

IDD at TA max = 105 °C added to Table 16: Typical and maximum

current consumptions in Stop and Standby modes on page 42.

IDD_VBAT removed from Table 21: Typical current consumption in

Standby mode on page 47.

Values added to Table 40: SCL frequency (fPCLK1= 36 MHz.,VDD =

3.3 V) on page 63.

Figure 27: SPI timing diagram - slave mode and CPHA = 0 on page 65

modified. Equation 1 corrected.

tRET at TA = 105 °C modified in Table 29: Flash memory endurance and

data retention on page 54.

VUSB added to Table 43: USB DC electrical characteristics on page 67.

Figure 47: LQFP100 PD max vs. TA on page 84 modified.

Axx option added to Table 57: Ordering information scheme on

page 85.

Table 58.

Document revision history (continued)

Date

Revision

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STM32F103CBU6TR 数据表(PDF) 89 Page - STMicroelectronics

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