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MAS6501 数据表(PDF) 7 Page - Micro Analog systems |
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MAS6501 数据表(HTML) 7 Page - Micro Analog systems |
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7 / 16 page ![]() DA6501.001 27 October 2008 7 (16) I 2C SERIAL INTERFACE CONTROL... I2C Bus Protocol Definitions Two wire I2C bus protocol has special bus signal conditions. Figure 2 shows start (S), stop (P) and binary data conditions. At start condition the SCL is high and SDA has falling edge. At stop condition the SCL is also high but SDA has rising edge. Data must be held stable in SDA pin when SCL is high. Data can change value at SDA pin only when SCL is low. SDA SCL S P 1 0 Figure 2. I2C protocol definitions I2C contains also acknowledge (A) and not acknowledge (N) commands. At acknowledge the master device sends 0 bit to SDA bus (pulls down SDA) for one SCL clock cycle. At not acknowledge (N) the slave device sends 0 bit to SDA (pulls down SDA) for one SCL clock cycle. Abbreviations: A= Acknowledge by Slave N = Not Acknowledge by Master S = Start P = Stop Conversion Starting – Write Sequence Conversion is started by first writing measurement configuration bits into the control register. Write sequence is illustrated in Table 4. To start conversion the control register SCO bit has to be set high (SCO=1, see control register bit description in table 1). Table 4. MAS6501 I2C bus write sequence bits S AW A AC A DC A P Abbreviations: AW = Device Write Address (%1110 1110) AR = Device Read Address (%1110 1111) AC = Control Register Address (%1111 1111) Ax = MSB (x=M, %1111 1101) or LSB (x=L, %1111 1110) ADC Result Register Address DC = Control Register Data Dx = MSB (x=M) or LSB (x=L) A/D Result Register Data Each I2C bus operation like write starts with start command (see figure 2). After start the MAS6501 device address with write bit (AW, see table 2) is sent and ended to acknowledge (A). After this control register address (AC, see table 3) is sent and ended to acknowledge (A). Next control register data (DC, see table 1) is written and ended to acknowledge (A). Finally the I2C bus operation is ended with stop command (see figure 2). A/D Conversion A/D conversion is progressed by running MCLK signal until EOC goes high indicating that conversion is done and data is ready for reading. |
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