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CPC7594MATR 数据表(PDF) 9 Page - Clare, Inc. |
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CPC7594MATR 数据表(HTML) 9 Page - Clare, Inc. |
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9 / 20 page ![]() CPC7594 R03 www.clare.com 9 1.7 Digital I/O Electrical Specifications 1.8 Voltage and Power Specifications Parameter Test Conditions Symbol Minimum Typical Maximum Unit Input Characteristics Input voltage, Logic low Input voltage falling VIL 0.8 1.0 - V Input voltage, Logic high Input voltage rising VIH 1.7 2.0 Input leakage current, INRINGING and INTEST, Logic high VDD = 5.5 V, VBAT = -75 V, VHI =2.4 V IIH -0.1 1 μA Input leakage current, INRINGING and INTEST, Logic low VDD = 5.5 V, VBAT = -75 V, VIL = 0.4 V IIL -0.1 1 μA Input leakage current, LATCH Logic high VDD = 4.5 V, VBAT = -75 V, VIH = 2.4 V IIH 719 - μA LATCH Pull-up Minimum Load VDD = 4.5 V, VBAT = -75 V, IIN = -10 μA Latch input transitions to logic high. Logic = High True Input leakage current, LATCH Logic low VDD = 5.5 V, VBAT = -75 V, VIL = 0.4 V IIL - 46 125 μA Input leakage current, TSD Logic high VDD = 5.5 V, VBAT = -75 V, VIH = 2.4 V IIH 10 16 30 μA Input leakage current, TSD Logic low VDD = 5.5 V, VBAT = -75 V, VIL = 0.4 V IIL 10 16 30 μA Output Characteristics Output voltage, TSD Logic high VDD = 5.5 V, VBAT = -75 V, ITSD = 10μAVTSD_off 2.4 VDD -V Output voltage, TSD Logic low VDD = 5.5 V, VBAT = -75 V, ITSD = 1mA VTSD_on -0 0.4 V Parameter Test Conditions Symbol Minimum Typical Maximum Unit Voltage Requirements VDD - VDD 4.5 5.0 5.5 V VBAT 1 - VBAT -19 -48 -72 V 1V BAT is used only for internal protection circuitry. If VBAT rises above-10 V, the device will enter the all-off state and will remain in the all-off state until the battery drops below approximately -15 V Power Specifications Power consumption VDD = 5 V, VBAT = -48 V, Measure IDD and IBAT, Talk and All-Off States P - 5.5 10 mW All other states P - 6.5 10 mW VDD current VDD = 5 V, VBAT = -48 V Talk and All-Off states IDD 1.1 2.0 mA Ringing and Test states IDD -1.3 2.0 mA VBAT current VDD = 5 V, VBAT = -72 V, All states IBAT -0.1 10 μA |
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