AT90SCR100 datasheet(108/433 Pages) ATMEL

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TPR0327AY–SMS–30Jan09

AT90SCR100

Note:

1. The example code assumes that the part specific header file is included.

For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI”

instructions must be replaced with instructions that allow access to extended I/O. Typically

“LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.

The assembly code example returns the TCNT1 value in the r17:r16 register pair.

It is important to notice that accessing 16-bit registers are atomic operations. If an interrupt

occurs between the two instructions accessing the 16-bit register, and the interrupt code

updates the temporary register by accessing the same or any other of the 16-bit Timer Regis-

ters, then the result of the access outside the interrupt will be corrupted. Therefore, when both

the main code and the interrupt code update the temporary register, the main code must disable

the interrupts during the 16-bit access.

The following code examples show how to do an atomic read of the TCNT1 Register contents.

Reading any of the OCR1A/B or ICR1 Registers can be done by using the same principle

Assembly Code Examples(1)

...

; Set TCNT1 to 0x01FF

ldi

r17,0x01

ldi

r16,0xFF

out

TCNT1H,r17

out

TCNT1L,r16

; Read TCNT1 into r17:r16

r16,TCNT1L

r17,TCNT1H

...

C Code Examples(1)

unsigned int

...

/* Set TCNT1 to 0x01FF */

TCNT1 = 0x1FF;

/* Read TCNT1 into i */

i = TCNT1;

...

AT90SCR100 数据表(PDF) 108 Page - ATMEL Corporation

AT90SCR100 数据表(HTML) 108 Page - ATMEL Corporation

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