AT90SCR100 datasheet(21/433 Pages) ATMEL

21 / 433 page

TPR0327AY–SMS–30Jan09

AT90SCR100

AT90SCR100 Memories

This section describes the different memories in the AT90SCR100. The AVR architecture has

two main memory spaces: the Data Memory and the Program Memory spaces. In addition, the

AT90SCR100 features an EEPROM Memory for data storage. All three memory spaces are lin-

ear and regular.

6.1

In-System Reprogrammable Flash Program Memory

The AT90SCR100 contains 64K bytes On-chip In-System Reprogrammable Flash memory for

program storage. As all AVR instructions are 16 or 32 bits wide, the Flash is organized as 32K x

16. For software security, the Flash Program memory space is divided into two sections, Boot

Program section and Application Program section. See “Application and Boot Loader Flash Sec-

tions” on page 363.

The Flash memory has an endurance of at least 10,000 write/erase cycles. The AT90SCR100

Program Counter (PC) is 15/16 bits wide, which permits to address the 32/64K program memory

locations. The operation of Boot Program section and associated Boot Lock bits for software

protection are described in detail in “Memory Programming” on page 377. “Memory Program-

ming” on page 377 contains a detailed description of Flash data serial downloading using the

SPI pins or the JTAG interface.

Constant tables can be allocated within the entire program memory address space (see the LPM

– Load Program Memory instruction description).

Timing diagrams for instruction fetch and execution are presented in “Instruction Execution Tim-

ing” on page 17.

AT90SCR100 数据表(PDF) 21 Page - ATMEL Corporation