ATtiny45 datasheet(100/196 Pages) ATMEL

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100

7598H–AVR–07/09

ATtiny25/45/85

16.2.3

SPI Slave Operation Example

The following code demonstrates how to use the USI module as a SPI Slave:

init:

ldi

r16,(1<<USIWM0)|(1<<USICS1)

sts

USICR,r16

...

SlaveSPITransfer:

sts

USIDR,r16

ldi

r16,(1<<USIOIF)

sts

USISR,r16

SlaveSPITransfer_loop:

lds

r16, USISR

sbrs

r16, USIOIF

rjmp

SlaveSPITransfer_loop

lds

r16,USIDR

ret

The code is size optimized using only eight instructions (+ ret). The code example assumes that

the DO is configured as output and USCK pin is configured as input in the DDR Register. The

value stored in register r16 prior to the function is called is transferred to the master device, and

when the transfer is completed the data received from the Master is stored back into the r16

Note that the first two instructions is for initialization only and needs only to be executed

once.These instructions sets Three-wire mode and positive edge Shift Register clock. The loop

is repeated until the USI Counter Overflow Flag is set.

16.2.4

Two-wire Mode

The USI Two-wire mode is compliant to the Inter IC (TWI) bus protocol, but without slew rate lim-

iting on outputs and input noise filtering. Pin names used by this mode are SCL and SDA.

ATtiny45 数据表(PDF) 100 Page - ATMEL Corporation

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