LSM320HAY30 datasheet(30/42 Pages) STMICROELECTRONICS

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LSM320HAY30

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Doc ID 16917 Rev 1

The BOOT bit is used to refresh the content of the internal registers stored in the Flash

memory block. At device power-up, the content of the Flash memory block is transferred to

the internal registers related to trimming functions to permit good device behavior. If, for any

reason, the content of the trimming registers was changed, it is sufficient to use this bit to

restore the correct values. When the BOOT bit is set to ‘1’, the content of internal Flash is

copied to the corresponding internal registers and is used to calibrate the device. These

values are factory-trimmed and are different for every accelerometer. They permit good

device behavior and normally do not have to be modified. At the end of the boot process, the

BOOT bit is again set to ‘0’.

HPCF[1:0]. These bits are used to configure the high-pass filter cut-off frequency ft which is

given by:

The equation can be simplified to the following approximated equation:

HPen1

High-pass filter enabled for Interrupt 1 source. Default value: 0

(0: filter bypassed; 1: filter enabled)

HPCF1,

HPCF0

High-pass filter cut-off frequency configuration. Default value: 00

(00: HPc=8; 01: HPc=16; 10: HPc=32; 11: HPc=64)

Table 22.

High-pass filter mode configuration

HPM1

HPM0

High-pass filter mode

Normal mode (reset reading HP_RESET_FILTER)

Reference signal for filtering

Normal mode (reset reading HP_RESET_FILTER)

Table 23.

High-pass filter cut-off frequency configuration

HPcoeff2,1

ft [Hz]

Data rate = 50 Hz

ft [Hz]

Data rate = 100 Hz

ft [Hz]

Data rate = 400 Hz

ft [Hz]

Data rate = 1000 Hz

0.5

0.25

0.5

0.125

0.25

2.5

Table 21.

LA_CTRL_REG2 description (continued)

HPc

------------

–

⎝⎠

⎛⎞

------

⋅

6HPc

⋅

----------------------

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