71M6521FE-IMSLASHF datasheet(6/101 Pages) TERIDIAN

6 / 101 page

71M6521DE/71M6521FE

Energy Meter IC

DATASHEET

JANUARY 2008

Page: 6 of 101

v1.0

List of Tables

Table 1: Inputs Selected in Regular and Alternate Multiplexer Cycles .........................................................................10

Table 2: CE DRAM Locations for ADC Results............................................................................................................13

Table 3: Meter Equations. ...........................................................................................................................................13

Table 4: Memory Map ..................................................................................................................................................16

Table 5: Stretch Memory Cycle Width..........................................................................................................................17

Table 6: Internal Data Memory Map.............................................................................................................................18

Table 7: Special Function Registers Locations ............................................................................................................18

Table 8: Special Function Registers Reset Values ......................................................................................................19

Table 9: PSW Register Flags.......................................................................................................................................20

Table 10: PSW Bit Functions .......................................................................................................................................20

Table 11: Port Registers ..............................................................................................................................................21

Table 12: Special Function Registers...........................................................................................................................22

Table 13: Baud Rate Generation..................................................................................................................................23

Table 14: UART Modes................................................................................................................................................23

Table 15: The S0CON Register ...................................................................................................................................23

Table 16: The S1CON register.....................................................................................................................................24

Table 17: The S0CON Bit Functions ............................................................................................................................24

Table 18: The S1CON Bit Functions ............................................................................................................................24

Table 19: The TCON Register......................................................................................................................................25

Table 20: The TCON Register Bit Functions................................................................................................................25

Table 21: The TMOD Register .....................................................................................................................................26

Table 22: TMOD Register Bit Description ....................................................................................................................26

Table 23: Timers/Counters Mode Description ..............................................................................................................26

Table 24: Timer Modes ................................................................................................................................................27

Table 25: The PCON Register .....................................................................................................................................27

Table 26: PCON Register Bit Description.....................................................................................................................27

Table 27: The IEN0 Register (see also Table 32) ........................................................................................................28

Table 28: The IEN0 Bit Functions (see also Table 32).................................................................................................28

Table 29: The IEN1 Register (see also Tables 30/31) .................................................................................................28

Table 30: The IEN1 Bit Functions (see also Tables 30/31) ..........................................................................................28

Table 31: The IP0 Register (see also Table 45)...........................................................................................................28

Table 32: The IP0 bit Functions (see also Table 45)....................................................................................................29

Table 33: The WDTREL Register.................................................................................................................................29

Table 34: The WDTREL Bit Functions .........................................................................................................................29

Table 35: The IEN0 Register........................................................................................................................................30

Table 36: The IEN0 Bit Functions ................................................................................................................................30

Table 37: The IEN1 Register........................................................................................................................................30

Table 38: The IEN1 Bit Functions ................................................................................................................................30

Table 39: The IEN2 Register........................................................................................................................................31

Table 40: The IEN2 Bit Functions ................................................................................................................................31

Table 41: The TCON Register......................................................................................................................................31

Table 42: The TCON Bit Functions ..............................................................................................................................31

Table 43: The T2CON Bit Functions ............................................................................................................................31

Table 44: The IRCON Register ....................................................................................................................................32

Table 45: The IRCON Bit Functions.............................................................................................................................32

Table 45: External MPU Interrupts ...............................................................................................................................32

71M6521FE-IM/F 数据表(PDF) 6 Page - Teridian Semiconductor Corporation

71M6521FE-IM/F 数据表(HTML) 6 Page - Teridian Semiconductor Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载