HT86B05 datasheet(36/79 Pages) HOLTEK

36 / 79 page

HT86BXX/HT86BRXX

Rev. 1.60

October 20, 2009

Timer Registers

- TMR0, TMR1, TMR2L/TMR2H,

TMR3

The timer registers are special function registers located

in the special purpose Data Memory and is the place

where the actual timer value is stored. All devices con-

tain three 8-bit timers, whose registers are known as

TMR0, TMR1 and TMR3. The HT86B40, HT86B50,

HT86B60, HT86BR60, HT86B70, HT86B80 and

HT86B90 devices also contain an additional single

16-bit timer, which has a pair of registers known as

TMR2L and TMR2H. The value in the timer registers in-

creases by one each time an internal clock pulse is re-

ceived. The timer will count from the initial value loaded

by the preload register to the full count of FFH for the

8-bit timer or FFFFH for the 16-bit timers at which point

the timer overflows and an internal interrupt signal is

generated. The timer value will then be reset with the ini-

tial preload register value and continue counting.

Note that to achieve a maximum full range count of FFH

for the 8-bit timer or FFFFH for the 16-bit timers, the

preload registers must first be cleared to all zeros. It

should be noted that after power-on, the preload regis-

ters will be in an unknown condition. Note that if the

Timer Counters are in an OFF condition and data is writ-

ten to their preload registers, this data will be immedi-

ately written into the actual counter. However, if the

counter is enabled and counting, any new data written

into the preload data register during this period will re-

main in the preload register and will only be written into

the actual counter the next time an overflow occurs.

Note also that when the timer registers are read, the

timer clock will be blocked to avoid errors, however, as

this may result in certain timing errors, programmers

must take this into account.

For devices which have an internal 16-bit Timer, and

which therefore have both low byte and high byte timer

registers, accessing these registers is carried out in a

specific way. It must be noted that when using instruc-

tions to preload data into the low byte register, namely

TMR2L, the data will only be placed in a low byte buffer

and not directly into the low byte register. The actual

transfer of the data into the low byte register is only car-

ried out when a write to its associated high byte register,

namely TMR2H, is executed. However, using instruc-

tions to preload data into the high byte timer register will

result in the data being directly written to the high byte

will be transferred into its associated low byte register.

For this reason, when preloading data into the 16-bit

timer registers, the low byte should be written first. It

must also be noted that to read the contents of the low

byte register, a read to the high byte register must first

be executed to latch the contents of the low byte buffer

into its associated low byte register. After this has been

done, the low byte register can be read in the normal

way. Note that reading the low byte timer register will

only result in reading the previously latched contents of

the low byte buffer and not the actual contents of the low

byte timer register.

Timer Control Registers

- TMR0C, TMR1C, TMR2C,

TMR3C

Each timer has its respective timer control register,

known as TMR0C, TMR1C, TMR2C and TMR3C. It is

the timer control register together with their correspond-

ing timer registers that control the full operation of the

timers. Before the timers can be used, it is essential that

the appropriate timer control register is fully pro-

grammed with the right data to ensure its correct opera-

tion, a process that is normally carried out during

program initialization. Bits 7 and 6 of the Timer Control

spectively, must be set to the required logic levels. The

timer-on bit, which is bit 4 of the Timer Control Register

and known as TON, depending upon which timer is

used, provides the basic on/off control of the respective

timer. setting the bit high allows the timer to run, clearing

the bit stops the timer. For the 8-bit timers, which have

prescalers, bits 0~2 of the Timer Control Register deter-

mine the division ratio of the input clock prescaler.

T i m e r M o d e C o n t r o l

T 2 O N

T 2 T M 1 T 2 T M 0

f S Y S / 4

D a t a B u s

R e l o a d

O v e r f l o w

t o I n t e r r u p t

L o w B y t e

B u f f e r

H i g h B y t e

L o w B y t e

1 6 - B i t T i m e r

1 6 - b i t

P r e l o a d R e g i s t e r

f S Y S

16-bit Timer Structure

- HT86B40/HT86B50/HT86B60/HT86BR60/HT86B70/HT86B80/HT86B90

HT86B05 数据表(PDF) 36 Page - Holtek Semiconductor Inc

HT86B05 数据表(HTML) 36 Page - Holtek Semiconductor Inc

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