MPC8544EBVTALF datasheet(24/120 Pages) FREESCALE

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MPC8544E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 3

Freescale Semiconductor

Enhanced Three-Speed Ethernet (eTSEC), MII Management

Enhanced Three-Speed Ethernet (eTSEC),

MII Management

This section provides the AC and DC electrical characteristics for enhanced three-speed and MII

management.

8.1

Enhanced Three-Speed Ethernet Controller (eTSEC)

(10/100/1000 Mbps)—SGMII/GMII/MII/TBI/RGMII/RTBI/RMII/FIFO

Electrical Characteristics

The electrical characteristics specified here apply to all gigabit media independent interface (GMII), 8-bit

FIFO interface (FIFO), serial gigabit media independent interface (SGMII), media independent interface

(MII), ten-bit interface (TBI), reduced gigabit media independent interface (RGMII), reduced ten-bit

interface (RTBI), and reduced media independent interface (RMII) signals except management data

input/output (MDIO) and management data clock (MDC). The 8-bit FIFO interface can operate at 3.3 or

2.5 V. The RGMII and RTBI interfaces are defined for 2.5 V, while the MII, GMII, TBI, and RMII

interfaces can be operated at 3.3 or 2.5 V. Whether the GMII, MII, or TBI interface is operated at 3.3 or

2.5 V, the timing is compliant with IEEE 802.3. The RGMII and RTBI interfaces follow the Reduced

Gigabit Media-Independent Interface (RGMII) Specification Version 1.3 (12/10/2000). The RMII

interface follows the RMII Consortium RMII Specification Version 1.2 (3/20/1998). The SGMII interfaces

follow the Serial Gigabit Media-Independent Interface (SGMII) Specification Version 1.8. The electrical

characteristics for MDIO and MDC are specified in Section 9, “Ethernet Management Interface Electrical

Characteristics.”

8.2

eTSEC DC Electrical Characteristics

All GMII, MII, TBI, RGMII, RTBI, RMII, and FIFO drivers and receivers comply with the DC parametric

attributes specified in Table 21 and Table 22. The potential applied to the input of a GMII, MII, TBI, RTBI,

RMII, and FIFO receiver may exceed the potential of the receiver’s power supply (that is, a GMII driver

powered from a 3.6-V supply driving VOH into a GMII receiver powered from a 2.5-V supply). Tolerance

for dissimilar GMII driver and receiver supply potentials is implicit in these specifications. The RGMII

and RTBI signals are based on a 2.5-V CMOS interface voltage as defined by JEDEC EIA/JESD8-5.

Table 21. GMII, MII, TBI, RMII and FIFO DC Electrical Characteristics

Parameter

Symbol

Min

Max

Unit

Notes

Supply voltage 3.3 V

LVDD

TVDD

3.135

3.465

1, 2

Output high voltage (LVDD/TVDD = Min, IOH = –4.0 mA)

VOH

2.4

—

Output low voltage (LVDD/TVDD = Min, IOL = 4.0 mA)

VOL

—

0.5

—

Input high voltage

VIH

1.95

—

Input low voltage

VIL

—0.90

—

Input high current (VIN = LVDD, VIN = TVDD)IIH

—40

μA

1, 2, 3

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