MPC8544EBVTALF datasheet(32/120 Pages) FREESCALE

部件名	MPC8544EBVTALF

功能描述	PowerQUICC??III Integrated Processor Hardware Specifications

PDF	120 Pages

Scroll/Zoom	100%

制造商	FREESCALE [Freescale Semiconductor, Inc]

网页	http://www.freescale.com

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MPC8544E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 3

Freescale Semiconductor

Enhanced Three-Speed Ethernet (eTSEC), MII Management

Timing diagrams for FIFO appear in Figure 11 and Figure 12.

Figure 11. FIFO Transmit AC Timing Diagram

Figure 12. FIFO Receive AC Timing Diagram

8.5.2

GMII AC Timing Specifications

This section describes the GMII transmit and receive AC timing specifications.

8.5.2.1

GMII Transmit AC Timing Specifications

Table 30 provides the GMII transmit AC timing specifications.

Table 30. GMII Transmit AC Timing Specifications

At recommended operating conditions with L/TVDD of 3.3 V ± 5% or 2.5 V ± 5%

Parameter/Condition

Symbol1

Min

Typ

Max

Unit

Notes

GTX_CLK clock period

tGTX

—8.0

—

GTX_CLK to GMII data TXD[7:0], TX_ER, TX_EN delay

tGTKHDX

0.2

—

5.0

GTX_CLK data clock rise time (20%-80%)

tGTXR

——

1.0

—

tFITF

TXD[7:0]

TX_EN

GTX_CLK

TX_ER

tFITDV

tFITR

tFITH

tFIT

tFITDX

tFIRF

tFIRR

RX_CLK

RXD[7:0]

RX_DV

RX_ER

Valid Data

tFIRDX

tFIRDV

tFIRH

tFIR

MPC8544EBVTALF 数据表(PDF) 32 Page - Freescale Semiconductor, Inc

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