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AS1525 数据表(PDF) 3 Page - ams AG

部件名 AS1525
功能描述  150ksps, 12-Bit, 1-Channel Pseudo/True-Differential and 2-Channel Single-Ended ADCs
PDF  22 Pages
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制造商  AMSCO [ams AG]
网页  http://www.ams.com
标志 AMSCO - ams AG

AS1525 数据表(HTML) 3 Page - ams AG

  AS1525 Datasheet HTML 1Page - ams AG AS1525 Datasheet HTML 2Page - ams AG AS1525 Datasheet HTML 3Page - ams AG AS1525 Datasheet HTML 4Page - ams AG AS1525 Datasheet HTML 5Page - ams AG AS1525 Datasheet HTML 6Page - ams AG AS1525 Datasheet HTML 7Page - ams AG AS1525 Datasheet HTML 8Page - ams AG AS1525 Datasheet HTML 9Page - ams AG Next Button
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www.austriamicrosystems.com
Revision 1.02
3 - 22
AS1524/AS1525
Datasheet - P i n o u t
4 Pinout
Pin Assignment
Figure 2. Pin Assignments (Top View)
Pin Description
Table 2. Pin Description
Pin Number
Pin Name
Description
1
VDD
Positive Supply Voltage. +2.7V to +5.25V.
Note: Bypass with a 0.1µF capacitor to GND.
2AIN1/AIN+
Analog Input Channel 1 (AS1525) or Positive Analog Input (AS1524)
3AIN2/AIN-
Analog Input Channel 2 (AS1525) or Negative Analog Input (AS1524)
4GND
Ground
5REF
External Reference Voltage Input. Sets the analog voltage range.
Note: Bypass with a 4.7µF capacitor to GND.
6
CNVST
Conversion Start. A rising edge powers up the device and puts the track/
hold circuitry in track mode. At the falling edge of this pin, the device enters
hold mode and begins a conversion.
Note: This pin also selects the input channel (AS1525) or input polarity
(AS1524).
7DOUT
Serial Data Output. This pin transitions the falling edge of SCLK and goes
low at the start of a conversion and delivers the MSB at the completion of a
conversion.
Note: This pin goes high impedance once data has been fully clocked out.
8SCLK
Serial Clock Input. Clocks out data at DOUT with the MSB first.
AS1524/
AS1525
4
GND
3
AIN2/AIN-
2
AIN1/AIN+
1
VDD
5 REF
7DOUT
8 SCLK
6CNVST



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