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Revision 1.10

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AS5145

Data Sheet - D e t a i l e d D e s c r i p t i o n

CSn is low (internal Pull Up) the first time. In quadrature mode A = B = Index = high indicates an invalid output. If the interpolator recognizes a

difference larger than 128 steps between two samples it holds the last valid state. The interpolator synchronizes up again with the next valid

difference. This avoids undefined output burst, e.g. if no magnet is present.

8.1.3 Sync Mode

This mode is used to synchronize the external electronic with the AS5145. In this mode two signals are provided at the pins DTEST1_A and

DTEST2_B. By setting of Md0=1 and Md1=1 in the OTP register, the Sync Mode will be activated.

Figure 8. DTest1_A and DTest2_B

Every rising edge at DTEST1_A indicates that new data in the device is available. With this signal it is possible to trigger an external customer

Microcontroller (interrupt) and start the SSI readout. DTEST2_B indicates the phase of available data.

8.1.4 Sin/Cosine Mode

This mode can be enabled by setting the OTP Factory-bit FS2. If this mode is activated the 16 bit sinus and 16 bit cosines digital data of both

channels will be switched out. Due to the high resolution of 16 bits of the data stream an accurate calculation can be done externally. In this

mode the open drain outputs of DTEST1_A and DTEST2_B are switched to push-pull mode. At Pin MagDECn the clock impulse, at Pin

MagINCn the Enable pulse will be switched out. The Pin PWM indicates, which phase of signal is being presented. The mode isn’t available in

the default mode.

8.1.5 Daisy Chain Mode

The Daisy Chain mode allows connection of several AS5145s in series, while still keeping just one digital input for data transfer (see “Data IN” in

Figure 9). This mode is accomplished by connecting the data output (DO; pin 9) to the data input (PDIO; pin 8) of the subsequent device. The

serial data of all connected devices is read from the DO pin of the first device in the chain. The length of the serial bit stream increases with every

connected device, it is n * (18+1) bits: n= number of devices. e.g. 38 bit for two devices, 57 bit for three devices, etc.

The last data bit of the first device (Parity) is followed by a dummy bit and the first data bit of the second device (D11), etc. (see Figure 10).

Figure 9. Daisy Chain Hardware Configuration

DTest1_A

DTest1_B

400µs (100µs)

CSn

CSn

CSn

CSn

CLK

CLK

CLK

CLK

Data IN

AS5145

1

AS5145

2

AS5145

last Device

µC

DO

DO

DO

PDIO

PDIO

PDIO