MCP6271-ESLASHST datasheet(17/36 Pages) MICROCHIP

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DS21810F-page 17

MCP6271/1R/2/3/4/5

4.9.3

CASCADED OP AMP

APPLICATIONS

The MCP6275 provides the flexibility of Low power

mode for dual op amps in an 8-pin package. The

MCP6275 eliminates the added cost and space in a

battery powered application by using two single op

amps with Chip Select (CS) lines or a 10-pin device

with one CS line for both op amps. Since the two op

amps are internally cascaded, this device cannot be

used in circuits that require active or passive elements

between the two op amps. However, there are several

applications where this op amp configuration with a CS

line becomes suitable. The circuits below show

possible applications for this device.

4.9.3.1

Load Isolation

With the cascaded op amp configuration, op amp B can

be used to isolate the load from op amp A. In

applications where op amp A is driving capacitive or

low resistive loads in the feedback loop (such as an

integrator or filter circuit) the op amp may not have

sufficient source current to drive the load. In this case,

op amp B can be used as a buffer.

FIGURE 4-10:

Isolating the Load with a

Buffer.

4.9.3.2

Cascaded Gain

Figure 4-11 shows a cascaded gain circuit configura-

tion with Chip Select. Op amps A and B are configured

in a non-inverting amplifier configuration. In this

configuration, it is important to note that the input offset

voltage of op amp A is amplified by the gain of op amp

A and B, as shown below:

Therefore, it is recommended that you set most of the

gain with op amp A and use op amp B with relatively

small gain (e.g., a unity gain buffer).

FIGURE 4-11:

Cascaded Gain Circuit

Configuration.

4.9.3.3

Difference Amplifier

Figure 4-12 shows op amp A configured as a difference

amplifier with Chip Select. In this configuration, it is

recommended that well matched resistors (e.g., 0.1%)

be used to increase the Common Mode Rejection Ratio

(CMRR). Op amp B can be used to provide additional

gain and isolate the load from the difference amplifier.

FIGURE 4-12:

Difference Amplifier Circuit.

4.9.3.4

Inverting Integrator with Active

Compensation and Chip Select

Figure 4-13 uses an active compensator (op amp B) to

compensate for the non-ideal op amp characteristics

introduced at higher frequencies. This circuit uses

op amp B as a unity gain buffer to isolate the

integration capacitor C1 from op amp A and drives the

capacitor with a low impedance source. Since both op

amps are matched very well, they provide a high quality

integrator.

FIGURE 4-13:

Integrator Circuit with Active

Compensation.

VOUTB

MCP6275

Load

OUT

INGAGB

OSAGAGB

OSBGB

Where:

op amp A gain

op amp B gain

VOSA

op amp A input offset voltage

VOSB

op amp B input offset voltage

VIN

VOUT

MCP6275

VOUT

MCP6275

VIN2

VIN1

VOUT

MCP6275

VIN

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