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ADL5801ACPZ-R7 数据表(PDF) 13 Page - Analog Devices

部件名 ADL5801ACPZ-R7
功能描述  High IP3, 10 MHz to 6 GHz, Active Mixer
PDF  20 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADL5801ACPZ-R7 数据表(HTML) 13 Page - Analog Devices

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ADL5801
Rev. 0 | Page 13 of 20
APPLICATIONS INFORMATION
BASIC CONNECTIONS
The ADL5801 is designed to translate between radio frequencies
(RF) and intermediate frequencies (IF). For both upconversion
and downconversion applications, RFIP (Pin 16) and RFIN
(Pin 15) must be configured as the input interfaces. IFOP
(Pin 20) and IFON (Pin 21) must be configured as the output
interfaces. Individual bypass capacitors are needed in close
proximity to each supply pin (Pin 7, Pin 13, Pin 18, and Pin 24),
the VSET control pin (Pin 10), and the DETO detector output pin
(Pin 11). When the on-chip detector is chosen to form a closed
loop, automatically controlling the VSET pin, R7 can be
populated with a 0 Ω resistor. Alternatively, simply use a jumper
between the VSET and DETO test points for evaluation. Figure
28 illustrates the basic connections for ADL5801 operation.
RF AND LO PORTS
The RF and LO input ports are designed for a differential input
impedance of approximately 50 Ω.Figure 29 and Figure 30
illustrate the RF and LO interfaces, respectively. It is recommended
that each of the RF and LO differential ports be driven through a
balun for optimum performance. It is also necessary to ac couple
both RF and LO ports. Using proper value capacitors may help
improve the input return loss over desired frequencies. Table 4
lists the recommended components for various RF and LO
frequency bands. The characterization data is available in the
Typical Performance Characteristics section.
GND
VPLO
ENBL VSET
VPDT
RFIP
NC
GND
GND
VPLO
LOIP
T2
T4
T7
T3
T6
T9
C4
C5
C50
C6
C1
C12
C18
C8
C10
C9
C2
C3
T1
T5
T8
C17
VPOS
VSET
R10
R9
R7
VPOS
VPOS
VPOS
IFOP
LOIP
LOIN
C7
VPOS
DETO
LOIN
GND
GND
ADL5801
GND
GND
IFON
DETO GND
VPRF
GND
GND
IFOP
RFIN
24
1
2
3
4
5
7
8
9
10
11
12
6
18
17
16
15
14
13
23
22
21
20
19
IFON
ENBL
R12
R8
RFIP
RFIN
R4
R16
R14
C20
R50
C19
C13
L3
L1
L4
L5
L2
R3
R13
R11
R2
Figure 28. Basic Connections Schematic



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