ADL5801

Rev. 0 | Page 16 of 20

Table 5. Evaluation Board Configuration

Components

Function

Default Conditions

C2, C3, C6, C7, C10, C11

Power supply decoupling. Nominal supply decoupling consists of a

0.1 µF capacitor to ground in parallel with 100 pF capacitors to ground,

positioned as close to the device as possible. Series resistors are provided

for enhanced supply decoupling using optional ferrite chip inductors.

C2, C6, C10, C11 = 0.1 µF (size 0402)

C3, C7 = 100 pF (size 0402)

C8, C9, L4, L5, R4, R8,

R12, T3, T6, T9, RFIN,

RFIP

RF input interfaces. Input channels are ac-coupled through C8 and C9.

R8 and R12 provide options when additional matching is needed. T3 is

a 1:1 balun used to interface to the 50 Ω differential inputs. T6 and T9

provide options when high frequency baluns are used and require smaller

balun footprints.

C8, C9 = 5.6 pF (size 0402)

L4, L5, R12 = 0 Ω (size 0402)

R4, R8 = open (size 0402)

T3 = TC1-1-13M+ (Mini-Circuits)

C13, C19, C20, C50, L1,

L2, L3, R2, R3, R11, R13,

R50, T1, T5, T8, IFON,

IFOP

IF output interfaces. The 200 Ω open collector IF output interfaces are

biased through the center tap of a 4:1 impedance transformer at T1. C50

provides local bypassing with R50 available for additional supply

bypassing. L1 and L2 provide options when pull-up choke inductors are

used to bias the open-collector outputs. C13, L3, R2, and R3 are provided

for IF filtering and matching options. T5 and T8 provide options when high

frequency baluns are used and require smaller balun footprints.

C13 = open (size 0402)

C19, C20 = 100 pF (size 0402)

C50 = 0.1 µF (size 0402)

L1, L2 = open (size 0805)

L3 = open (size 0402)

R2, R3, R13, R50 = 0 Ω (size 0402)

R11 = open (size 0402)

T1 = TC4-1W+ (Mini-Circuits)

C4, C5, R14, R16, T2, T4,

T7, LOIN, LOIP

LO interface. C4 and C5 provide ac coupling for the local oscillator input.

T2 is a 1:1 balun that allows single-ended interfacing to the differential

50 Ω local oscillator input. T4 and T7 provide options when high frequency

baluns are used and require smaller balun footprints.

C4, C5 = 100 pF (size 0402)

R14 = 0 Ω (size 0402)

R16 = open (size 0402)

T2 = TC1-1-13M+ (Mini-Circuits)

C1, C12, R7, DETO

DETO interface. C1 and C12 provide decoupling for the DETO pin. R7

provides access to the VSET pin when automatic input IP3 control is

needed.

C1 = 0.1 µF (size 0603)

C12 = 100 pF (size 0402)

R7 = open (size 0402)

C17, C18, R9, R10, VSET

VSET bias control. C17 and C18 provide decoupling for the VSET pin. R9

and R10 form an optional resistor divider network between VPOS and

GND, allowing for a fixed bias setting. Supply 3.8 V at the VSET pin when

the DETO pin is not connected for automatic input IP3 control.

C17 = 100 pF (size 0402)

C18 = 0.1 µF (size 0603)

R9, R10 = open (size 0402)

Figure 34. Evaluation Board Top Layer

Figure 35. Evaluation Board Bottom Layer