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VT83201/D 数据表(PDF) 1 Page - Vaishali Semiconductor |
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VT83201/D 数据表(HTML) 1 Page - Vaishali Semiconductor |
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1 / 4 page ![]() 2001-04-12 Page 1 MDST-0011-01 www.vaishali.com Vaishali Semiconductor 747 Camden Avenue, Suite C Campbell CA 95008 Ph. 408.377.6060 Fax 408.377.6063 Applications •= DSL clock source •= Set-top boxes •= Telecom switching •= MPEG Video clock source •= HDTV General Description The Vaishali VT83201 is a single-chip, integrated VCXO and Phase Locked Loop (PLL) clock synthesizer. The device uses the VCXO and an analog Phase-Locked Loop (PLL) to accept a 10 MHz to 20 MHz, 30pF (pull range of 200 ppm) crystal input, in order to produce either one or two output clocks. A 0 to 3V control signal is used to fine tune the output clock frequency in the ±100ppm range. Select inputs S0 and S1 are used for frequency and output selection. Features •= 3.3V supply operation •= Packaged in 16-pin SOIC package •= Replaces separate VCXO and multiplier •= Uses inexpensive pullable crystal •= On-chip VCXO with 200 ppm pull range (±100 ppm) •= 5V-tolerant control inputs •= Zero ppm synthesis error in both clocks VT83201 3.3V Low Phase Noise VCXO (Voltage-Controlled Crystal Oscillator) and PLL Clock Synthesizer Figure 1. Functional Block Diagram CLK1 CLK2 VDD1 VDD2 X2 Load Cap Control Low Phase Noise PLL Output Buffer Output Buffer osc Load Caps OE 10-20 MHz Pullable Crystal S1:S0 VIN X1 |
类似零件编号 - VT83201/D |
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类似说明 - VT83201/D |
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