VT83201SLASHD datasheet(4/4 Pages) VAISH

4 / 4 page

VT83201

2001-04-12

Page

MDST-0011-01

www.Vaishali.com

Vaishali Semiconductor

747 Camden Avenue, Suite C

Campbell

CA 95008

Ph. 408.377.6060

Fax 408.377.6063

Table 6. AC Electrical Characteristics

TA = 0

°C to +70°C, VDD = 3.15 V to 3.45 V

Symbol

Parameter

Condition

Min

Typ

Max

Units

Fosc

Input Crystal Frequency

MHz

Output Clock Rise Time

0.8 to 2.0V

1.5

Output Clock Fall Time

2.0 to 0.8V

1.5

tod

Output Clock Duty Cycle

At VDD/2

tpZL, tpZH

Enable Time. OE to CLK

CL = 50pf

6.5

tpLZ, tpHZ

Disable Time. OE to CLK

CL = 50pf

5.5

tjit (pk – pk)

Maximum Absolute Jitter

(Peak to Peak)

±100

Phase Noise, relative to

carrier

10 KHz offset

-115

dBc/Hz

Output pullability

0V <VIN <3V

±100

ppm

Note:

1. Typical values are at VDD = 3.3V and 25°C

Table 7 Pullable Crystal Specifications

Parameter

Value

Correlation (load) capacitance

30 pF

C0/C1

240 max

ESR

Ω max

Operating Temperature

°C to +70°C

Initial Accuracy

±20 ppm

Temperature + Aging Stability

±50 ppm

Figure 3. External Crystal Connection Block Diagram

Ordering Information

Part Number

Marking

Shipping/Packaging

No. of Pins

Package

Temperature

VT83201S1

Tubes

SOIC

°C to +70°C

VT83201S1X

VT83201S1

Tape & Reel

SOIC

°C to +70°C

VT83201/D

Dice in waffle packe

°C to +70°C

VT83201/DW

Dice in wafer form

°C to +70°C

XTAL OSC

PLL

CLOCK

GEN

XTAL OSC

PLL

CLOCK

GEN

10-20 MHz

Pullable Crystal

Clk 1

Clk 2

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