VT83201

2001-04-12

Page

2

MDST-0011-01

www.Vaishali.com

Vaishali Semiconductor

747 Camden Avenue, Suite C

Campbell

CA 95008

Ph. 408.377.6060

Fax 408.377.6063

Figure 2. Pin Configuration

Table 1. Pin Description

Name

Pin #

Type

Description

X1

1

XI

Crystal connection. Connect to a pullable crystal of 10–20 MHz

2,3

P

VIN

4

I

Voltage input to VCXO. Zero to 3V signal controls the frequency of the VCXO.

GND

5,6, 7,13

P

Connect to ground.

OE

8

I

Active HIGH Output enable . Outputs in Hi-Z state when LOW

CLK1

9

O

Clock output #1 per Table 2.

S0

10

I

Select input #0. Selects output per Table 2

11

P

CLK2

12

O

Clock output #2 per Table 2

S1

14

I

Select input #1. Selects outputs per Table 2

NC

15

-

There is no internal connection to this pin.

X2

16

XO

Crystal connection. Connect to a pullable crystal of 10 MHz – 20 MHz.

Legend: I = Input

O = Output

P = Power supply connection

XI, XO = Crystal connections.

VT83201

16 pin SOIC

GND

GND

CLK2

CLK1

X1

VIN

GND

GND

NC

S1

S0

OE

X2

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9